Chapter 8. Other; Function Table Of Ic - Sharp HR-MB3 Service Manual

HR-MB3
CHAPTER 8. E Market HR-MB3 Service Manual HR-MB3 Audio
OTHER

[1] Function table of IC

IC100 RH-IXA068AWZZ: DSP (IXA068AW) (1/3)
Pin No. Port Name
1 VSS1
2 PU
3 DP
4 DN
5 USBVDD
6 GPIO7
7 VSS3
8 DVDD1
9 GPIO2
10 GPIO1
11 VSS4
12 GPIO0
13 X2/CLKIN
14 X1
15* CLKOUT
16 C0
17 C1
18 CVDD7
19 C2
20 C3
21 C4
22 C5
23* C6
24 DVDD8
25 C7
26 C8
27 C9
28 C11
29 CVDD8
30 RVDD2
31 C14
32 C12
33 VSS7
34 C10
35 C13
36 VSS8
37 VSS17
38 A13
39 A12
40 A11
41 CVDD2
42 A10
43 A9
44 A8
45 VSS16
46 A7
47 A6
48 A5
49 DVDD2
50 A4
51 A3
52 A2
53 RVDD3
54 A1
55* A0
56 DVDD9
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal Name Input/Output
VSS1
DSP_PU Output
DSP_DP Output
DSP_DM Output
USBVDD Input
USB_DET Input/Output
VSS3
DVDD1 Input
LCD_BL_ON Input/Output
CHARGER_CE_CONT Input/Output
VSS4
CVCC_CTL Input
X2 Input
X1 Input
CLKOUT Input
zRE Output
zOE Output
CVDD7 Input
zWE Output
READY Output
zCE0 Output
zCE1 Output
zCE2 Output
DVDD8 Input
zCE3 Output
zBE0 Output
zBE1 Output
zSDCAS Output
CVDD8 Input
RVDD2 Input
CLKMEM Output
zSDWE Output
VSS7
zSDRAS Output
zSDA10 Output
VSS8
VSS17
A13 Output
A12 Output
A11 Output
CVDD2 Input
A10 Output
A9 Output
A8 Output
VSS16
A7 Output
A6 Output
A5 Output
DVDD2 Input
A4 Output
A3 Output
A2 Output
RVDD3 Input
CLAMP SW Output
A0/A14 Output
DVDD9 Input
— GND.
Reserve. (Checker only)
Reserve. (Checker only)
Reserve. (Checker only)
Digital power for USB. (3.3V)
USB detect.
— GND.
Digital power for interface. (3.3V)
LCD backlight control.
Charge current control.
— GND.
1.6VREG. control.
System clock input. (12MHz)
System clock output. (12MHz)
Master clock output. (Checker only)
Data read control.
Data read control.
Digital power for CPU core. (1.6V)
Data write control.
Chip enable output.
Chip enable output0.
Chip enable output1.
Chip enable output2.
Digital power for interface. (3.3V).
Chip enable output3.
Byte enable control0.
Byte enable control1.
SDRAM column strobe.
Digital power for CPU core. (1.6V)
Digital power for CPU core. (1.6V)
Interface clock for SDRAM.
SDRAM write enable.
— Digital GND.
PSDRAM row strobe.
SDRAM A10 address.
— Digital GND.
— Digital GND.
Address bus A13.
Address bus A12.
Address bus A11.
Digital power for CPU core. (1.6V)
Address bus A10.
Address bus A9.
Address bus A8.
— Digital GND.
Address bus A7.
Address bus A6.
Address bus A5.
Digital power for interface. (3.3V)
Address bus A4.
Address bus A3.
Address bus A2.
Digital power for CPU core. (1.6V)
Address bus A1.
Address bus A0.
Digital power for interface. (3.3V)
8 – 1
Function