Sharp HR-MB3 Service Manual page 36

HR-MB3
IC400 VHIBQ24032+-1: Li-Ion Charge and Power Manag (BQ24032)
Pin No. Terminal Name
1 LDO
2 STAT1
3* STAT2
4 AC
5, 6 BAT
7 ISET2
8 PSEL
9 CE
10 ISET1
11 VSS
12 TS
13 DPPM
14 TMR
15~17 OUT
18* ACPG
19* USBPG
20 IUSB
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC500 RH-IXA069AWZZ: 256MB SDRAM (IXA069AW)
Pin No. Terminal Name
1 VDD
2 DQ0
3 VDDQ
4, 5 DQ1, DQ2
6 VSSQ
7, 8 DQ3, DQ4
9 VDDQ
10, 11 DQ5, DQ6
12 VSSQ
13 DQ7
14 VDD
15 LDQM
16 WE
17 CAS
18 RAS
19 CS
20, 21 BA0, BA1
22 A10
23~26 A0-A3
27 VDD
28 VSS
29~34 A4~A9
35, 36 A11, A12
37 CKE
38 CLK
39 DQM
Input/Output
Output 3.3 V LDO regulator.
Output Charge status output1. (open-drain)
Output Charge status output2. (open-drain).
Input Changer input voltage from AC adapter.
Input/Output Battery input and output.
Input Charge current set point for USB port. (High = 500 mA, Low = 100mA) For bp24032 see haif
charge current mode using ISET2.
Input Power source selection input. (low for USB, high for AC)
Input Chip enable input. (active high)
Input/Output Charge current set point for AC input and precharge and taper set point for both AC and
USB.
— Ground input (the terminal pad on the underside of the package). There is an internal electri-
cal connection between the exposed thermal pad and VSS pin of the device. The exposed
thermal pad must be connected to the same potential as the VSS pin on the printed circuit
board. Do not used the thermal pad as the primary ground input for the device. VSS pin
must be connected to ground at all times.
Input/Output Temperature sense input.
Input Dynamic power path management set point. (account for scale factor)
Input/Output Timer program input.
Output Output terminal to the system.
Output AC powergood status output. (open-drain)
Output USB powergood status output. (open-drain)
Input USB charge input voltage.
Power supply.
Data inputs/outputs are multiplexed on the same pins.
Data output power.
Data inputs/outputs are multiplexed on the same pins.
Data output ground.
Data inputs/outputs are multiplexed on the same pins.
Data output power.
Data inputs/outputs are multiplexed on the same pins.
Data inputs/outputs are multiplexed on the same pins.
Dynamic power path management set point. (account for scale factor)
Power supply.
Enables write operation and row precharge. Latches data in starting from CAS, WE active.
Latches column addresses on the positive going edge of the CLK with CAS low. Enables column access.
Latches roe addresses on the positive going edge of the CLK with RAS low. Enables row access & pre-
charge.
Disables or enables device operation by masking or enabling all inputs except CLK, CKE and DQM.
Selects bank to be activated during row address latch time. Selects bank for read/write during column
address latch time.
Row/column addresses are multiplexed on the same pins. Row address : RA0 - RA12, Column address :
CA0-CA8
Row/column addresses are multiplexed on the same pins. Row address : RA0 - RA12, Column address :
CA0-CA8
Power supply.
Ground.
Row/column addresses are multiplexed on the same pins. Row address : RA0 - RA12, Column address :
CA0-CA8
Row/column addresses are multiplexed on the same pins. Row address : RA0 - RA12, Column address :
CA0-CA8
Masks system clock to freeze operation from the next xloxk cycle. CKE should be enabled at least one cycle
prior to new command. Dlsable input buffers for power down in stand-by.
ctive on the positive going edge to sample all input.
Makes data output Hi-Z, tSHZ after the clock and makes the output. blocks data input when DQM active.
Function
Function
8 – 7