Placement Recommendations - Panasonic PAN1740 Design Manual


Schematic
J1_A
PCI-E-64

3.4 Placement Recommendations

Design Guide Rev. 1.0
J1_B
A1 B1
A2 B2
A3 B3
A4 B4
P0.2
A5 B5
A6 B6
P0.5
A7 B7
P0.6
A8 B8
P0.7
A9 B9
A10 B10
A11 B11
A12 B12
A13 B13
A14 B14
A15 B15
A16 B16
A17 B17
A18 B18
A19 B19
A20 B20
A21 B21
A22 B22
A23 B23
A24 B24
A25 B25
P1.1
A26 B26
SWCLK
A27 B27
A28 B28
P1.3
A29 B29
A30 B30
A31 B31
A32 B32
PCI-E-64
Antenna "Keep-Out Area"
Do not place any ground plane under the red marked restricted antenna area
in any layer! This would be affecting the performance of the chip antenna in a
critical manner.
Impact of Placement on the Antenna Radiation Pattern
The placement of the module, surrounding material, and customer
components has an impact on the radiation pattern of the antenna.
It is recommended to verify the perfect position of the module in the target
application before fixing the design.
P0.0
P0.1
VPP P0.2
P0.0 P0.3
P0.1 P0.4
P0.3 P0.5
P0.4 P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
RST
RST
Reset PIN resistor is not mounted if the module is empty
P1.0
SWDIO
P1.2
PAN1740/1740A Bluetooth Module
3 Reference Design
MOD1 PAN1740
12 VPP 14 VPP
P0.0
11 SW_CLK 16 SWCLK
P0.1
SWDIO
10 SW_DIO 18
P0.2
9
P0.3
6 VCC 8
P0.4
5
P0.5
4
P0.6 C1
3 GND 1
P0.7
GND 7
0.1
24 GND 15
P1.0
23 GND 17
P1.1
22 GND 19
P1.2
21 GND 20
P1.3
GND A
2 GND B
RST
GND C
13 GND D
N.C.
JP1 JP2
1 1
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