Table 21 Ultra Dma Cycle Timings (Device Terminating Read); Figure 12 Ultra Dma Cycle Timing Chart (Device Terminating Read) - Hitachi CinemaStar P7K500 Specifications

5.2.4.4
Device Terminating Read DMA
DMARQ
DMACK-
STOP
HDMARDY-
DSTROBE
DD(15:00)
Device drives DD

Figure 12 Ultra DMA cycle timing chart (Device terminating Read)

PARAMETER
DESCRIPTION
(all values in ns)
Time from DSTROBE
tSS
edge to negation of
DMARQ
tLI Limited interlock time
Maximum time allowed
tAZ for output drivers to
release
Minimum delay time
tZAH
required for output
Interlock time with
tMLI
minimum
CRC word setup time
tCS
(at device side)
CRC word hold time (at
tCH
device side)
Hold time after
tACK
DMACK–
Maximum time before
tIORDYZ
releasing IORDY

Table 21 Ultra DMA cycle timings (Device Terminating Read)

HITACHI Deskstar & CinemaStar P7K500 Hard Disk Drive specification (Rev 1.1)
tSS
tLI
tLI
tLI
tAZ
xxxxx
tZAH
MODE0 MODE1
MIN MAX MIN MAX
50 – 50 –
0 150 0 150
– 10 – 10
20 – 20 –
20 – 20 –
15 – 10 –
5 – 5 –
20 – 20 –
– 20 – 20
29
tMLI
tCS
xxxxxxxxxxxxxxxxxx
Host drives DD
MODE2 MODE3 MODE4
MIN MAX MIN MAX MIN
50 – 50 – 50
0 150 0 100 0
– 10 – 10 –
20 – 20 – 20
20 – 20 – 20
7 – 7 – 5
5 – 5 – 5
20 – 20 – 20
– 20 – 20 –
tACK
tACK
tIORDYZ
tCH
xxxxxxxxxx
CRC
MODE5 MODE6
MAX MIN MAX MIN
– 50 – 50
100 0 75 0
10 – 10 –
– 20 – 20
– 20 – 20
– 5 – 5
– 5 – 5
– 20 – 20
20 – 20 –
MAX
–
60
10
–
–
–
–
–
20