Sharp DV-500D Technical Manual page 104

12-6-1. Block Diagram
12-7. IC503 IX1479GE
GATE ARRAY
12-7-1. Block Diagram
1G 1
G
2
1Q1
Q
G
1Q2 3
Q
GND 4
G
1Q3 5
Q
G
6
1Q4
Q
7
V cc
G
8 Q
1Q5
G
9
1Q6
Q
10
GND
G
Q
1Q7 11
G
Q
12
1Q8
G
2Q1 13
Q
G
2Q2 14
Q
GND 15
G
Q
16
2Q3
G
17
2Q4
Q
18
V cc
G
19
2Q5 Q
G
20
2Q6
Q
GND 21
G
2Q7 22
Q
G
23
2Q8
Q
2G 24
DQ
8-15
Output
Buffer
Input
Buffer
Y-DECODER
ADDRESS
QUEUE
LATCHES
X-DECODER
ADDRESS
COUNTER
48 1LE
47 1D1
D
46
1D2
D
45
GND
44
D 1D3
43 1D4
D
42 V cc
D 41 1D5
40
1D6
D
39
GND
D
38 1D7
D
37 1D8
36 2D1
D
35
2D2
D
34 GND
D
33
2D3
32 2D4
D
31
V cc
30
D 2D5
29
2D6
D
28 GND
27 2D7
D
26
2D8
D
25 2LE
DQ
0-7
Output Input Input
Buffer Buffer Buffer
DATA
QUEUE
ID
REGISTER
Register
CSR
Register
ESRs
Data
Comparator
Y GATING/SENSING
12-7-2. Mode change table
Inputs
G LE D
H X X
L H L
L H H
L L X
H : High level
L : Low level
X : Immaterial
Z : High impedance
Q : Level of Q before the indicated steady input conditions
0
were established.
12-11
BYTE#
I/O Logic
CE#
OE#
WE#
RP#
RY/BY#
Program Erase
V
PP
Voltage Switch
V
CC
GND
Output Q
Z
L
H
Q
0
DV-560H