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Epson S1V3G340 Hardware Specification

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S1V3G340
Hardware Specification
Rev.1.0
Downloaded from
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Summary of Contents for Epson S1V3G340

  • Page 1 S1V3G340 Hardware Specification Rev.1.0 Downloaded from Elcodis.com electronic components distributor...
  • Page 2 Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.

  • Page 3: Table Of Contents

    ................22 6.4.6 Serial Interface (I2C) ....................... 23 6.4.7 SPI Flash Memory Interface Timing ................24 6.4.7.1 S1V3G340 read timing ....................24 6.4.7.2 Host flash access timing ....................25 7. External Connection Examples ..................... 26 System Clock ..........................26 7.1.1 Direct Input ........................
  • Page 4 ........................38 9.6.3 Power Supply Circuit ....................... 38 9.6.4 Arrangement of Signal Lines ................... 38 9.6.5 Noise-Induced Erratic Operations ................... 39 9.6.6 Others ..........................39 Revision History ..........................40 S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 5: Outline

    When an additional sound is required, it can respond by transmitting voice data from a host. The S1V3G340 features general-purpose output ports for flexible system design. All the functions are controlled by commands over a serial interface and thus easily added onto any existing systems with a host processor.

  • Page 6: Features

    2. Features 2. Features • Audio reproduction − High quality decoding (In EPSON’s original format) − Bit rate: 40 kbps, 32 kbps, 24 kbps, 16 kbps − Sampling rate: 16 kHz • Sequencer Messages − A sequence with up to 64 phrases can be set (no restriction on phrase combination) −...

  • Page 7: Pinout Diagram

    HPOP MSGRDY HVDD GP06 S1V3G340***** GP05 SPISWP GP04 QFP13-52 GP03 SCKS GP02 NSCSS GP01 SMSCK HPON FSOUT HVDD 9 10 11 12 13 Figure 3.1 Pinout diagram (QFP13-52) S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 8: Pin Description

    MSGRDY HVDD Serial Output Data Ready (H active) Serial interface selection SHISEL0 HVDD SHISEL[1:0] = LL: Clock syncronous SHISEL[1:0] = *H: Asynchronous SHISEL1 HVDD SHISEL[1:0] = HL: I2C S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 9 Audio output mode selection SNGLEND HVDD (L: differential output, H: single end output) SPHMT polarity selection HMTPOL HVDD (L active for L: SPHMT, H active for H: SPHMT) S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 10 13, 26, 34, 40, 52 Internal area and IO cell GND RVDD Internal voltage drop regulator power supply RVSS Internal voltage drop regulator GND Unused pins 7, 23, 42, Unused pins S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 11: Function Description

    SPI FLASH memory Figure 5.1 Standard application system Figure 5.1 shows a standard S1V3G340 application system. The host controls the S1V3G340 with commands (message protocol) issued via the serial interface. After Power On Reset, the S1V3G340 outputs audio from the internal DA converter while performing internal processing including decoding of the audio data from the SPI flash memory and the compressed audio data transmitted from the host.

  • Page 12: System Clock

    5. Function Description System Clock The S1V3G340 system clock frequency can be set to either 32.768 kHz or 12.288 MHz. The clock source can be set to be either direct input (input from CLKI pin) or oscillator (connected to OSCI/OSCO pin). Note that only 32.768 kHz oscillators can be used. The frequency and clock source settings are defined by the input pin CLKSEL and OSCEN settings.

  • Page 13: Serial Interface

    5. Function Description Serial Interface The S1V3G340 serial interface can be set to clock synchronous, asynchronous (UART), or I2C. • Clock synchronous Supports slave mode. Data length: 8-bit, fixed, MSB first • Asynchronous (UART) Data length: 8-bit, fixed, LSB first...
  • Page 14 I2C bus rising time of 480 ns or less. It should be noted that the maximum transfer speed will be lower if the I2C bus rising time exceeds 480 ns due to the load capacity and pull-up resistance. • When using the I2C interface, it is recommended to use the sequence playback. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 15: Electrical Characteristics

    -65 to +150 Recommended Operating Conditions ( VSS = 0V ) Parameter Symbol Min. Typ. Max. Unit HVDD Supply Voltage RVDD Input Voltage HVDD Output Voltage HVDD °C Ambient Temperature S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 16: Dc Characteristics

    IOL=4 mA Output characteristics Pin names: SIS, SOS, HPOP, HPON, FSOUT Off-state leakage μA current Pin capacitance Pin names: All input pins Input pin f=1 MHz capacitance HVDD=RVDD=0 V S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 17 HVDD=RVDD=0 V *1: Approximately current values during decoding under the recommended operating conditions (Ta=25°C). (Voice output with no load) *2: Static current under the recommended operating conditions (Ta=25°C). S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 18: Dc Characteristics For 3.3 V ±0.3 V Supply Voltage

    Pin capacitance Pin names: All input pins Input pin f=1 MHz capacitance HVDD=RVDD=0 V Pin capacitance Pin names: All output pins Output pin f=1 MHz capacitance HVDD=RVDD=0 V S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 19 HVDD=RVDD=0 V *1: Approximately current values during decoding under the recommended operating conditions (Ta=25°C). (Voice output with no load) *2: Static current under the recommended operating conditions (Ta=25°C). S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 20: Dc Characteristics For 2.4 V ±0.2 V Supply Voltage

    Pin capacitance Pin names: All input pins Input pin f=1 MHz capacitance HVDD=RVDD=0 V Pin capacitance Pin names: All output pins Output pin f=1MHz capacitance HVDD=RVDD=0 V S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 21 HVDD=RVDD=0 V *1: Approximately current values during decoding under the recommended operating conditions (Ta=25°C). (Voice output with no load) *2: Static current under the recommended operating conditions (Ta=25°C). S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 22: Ac Characteristics

    The jitter characteristics must meet both t and t characteristics. Cjper CJcycle Great care must be taken to ensure that overshooting or undershooting does not occur for the clock. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 23: System Clock Timing (12.288 Mhz)

    The jitter characteristics must meet both t and t characteristics. Cjper CJcycle Great care must be taken to ensure that overshooting or undershooting does not occur for the clock. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 24: Power-On / Reset Timing

    Note: The circuit must be initialized with NRESET after initiating power supply. The internal circuit state cannot be guaranteed when switching the HVDD from off to on, due to power supply noise and other factors. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 25: Command Receipt Timing

    Parameter Min. Max. Unit Length of time from initialization to message acceptance ready state (*1) There should be no problem about sending padding bytes during the t period. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 26: Serial Interface (Clock Synchronous)

    SCKS rising time to NSCSS rising time SIS setup time SIS hold time SCKS falling time to SOS going active NSCSS falling time to SOS going active NSCSS rising time to SOS going Hi-Z S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 27: Serial Interface (I2C)

    These numerical values are based on the I2C bus rising time of 480 ns or less. It should be noted that the numerical values will be greater if the I2C bus rising time exceeds 480 ns due to the load capacity and pull-up resistance. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 28: Spi Flash Memory Interface Timing

    6. Electrical Characteristics 6.4.7 SPI Flash Memory Interface Timing 6.4.7.1 S1V3G340 read timing Figure 6.7 Read timing Symbol Item Min. Typ. Max. Unit SMCS falling time to SMSCK rising time SMSCK falling time to SMCS rising time SMCS standby pulse time...

  • Page 29: Host Flash Access Timing

    Delay time from SMSI input to SOS output In flash access mode, the serial communication interface signal is connected to the SPI flash memory interface. For details of flash access mode, refer to the “Flash Access Specifications.” S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 30: External Connection Examples

    7. External Connection Examples System Clock The S1V3G340 system clock frequency can be set to either 32.768 kHz or 12.288 MHz. Likewise, the clock source can be set to either direct input (input from CLKI pin) or oscillator (connected to OSCI/OSCO pin).

  • Page 31: Oscillator (32.768 Khz)

    Table 7.1 32.768 kHz oscillator external circuit constant examples Crystal X’tal 32.768 kHz oscillator (Epson Toyocom FC-135) Gate capacity 10 pF Drain capacity 10 pF Feedback resistance 10 MΩ Drain resistance 200 kΩ S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 32: Serial Interface

    High level once a message is received. MSGRDY is an output signal that indicates a command from the S1V3G340 is ready to be sent. This signal can be used as an interrupt signal sent to the host to warn the host to reduce loads to prepare for message receipt.

  • Page 33: Asynchronous (Uart)

    “S1V3034x Series Message Protocol Specification.” MSGRDY is an output signal indicating that a command to be sent from the S1V3G340 is ready to be sent. For more information on the data receiving flow on the host side and the MSGRDY output timing, see “S1V3034x Series Message Protocol Specification.”...

  • Page 34: I2C

    If I2C is used, set the SHISEL0 input pin to Low level and SHISEL1 to High level. MSGRDY is an output signal indicating that a command to be sent from the S1V3G340 is ready to be sent. For more information on the data receiving flow on the host side and the MSGRDY output timing, see “S1V3034x Series Message Protocol Specification.”...

  • Page 35: Package Dimensions

    8. Package Dimensions 8. Package Dimensions QFP13-52 S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 36: Reference Material

    9. Reference Material 9. Reference Material Circuit Application Example Figure 9.1 shows a typical S1V3G340 circuit application. Figure 9.1 S1V3G340 circuit application example *1: The system clock input unit connection configuration will vary, depending on the clock frequency and clock source used.

  • Page 37: Circuit Application Example (Audio Output Unit)

    Circuit Application Example (Audio Output Unit) Figure 9.2 shows a typical audio output unit circuit application. Figure 9.2 S1V3G340 circuit application example (audio output unit) The connection from the HPOP/HPON pins to the secondary LPF (510 Ω, 39 nF) should be as short as possible.

  • Page 38: Mute Start/Release Timing

    STBYEXIT: Low → STANDBY_EXIT_IND received → MUTE released Note: In the above timing chart, the MUTE pin is at the Low level and MUTE is active. * Refer to the Message Protocol Specification for details of standby mode. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 39: Power Supply Precautions

    Avoid lowering below VSS. (2) Make sure the device is not subject to abnormal noise. (3) The potential for unused input pins should be pegged to VDD or VSS. (4) Do not short-circuit the output. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 40: Clock Direct Input Precautions

    S 1 V 3 G 3 4 0 Clock CLKI Generator Dumping Resistance Figure 9.3 Typical clock input overshoot/undershoot prevention measures S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...

  • Page 41: Precautions On Mounting

    Do not configure digital signal lines in parallel with components and lines even if such components and lines on other layers. OSCI OSCO Figure 9.4 Example of oscillation circuit VSS pattern S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 42: Reset Circuit

    Do not arrange a high-speed signal line especially near circuits that are sensitive to noise such as the oscillation unit. S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com...

  • Page 43: Noise-Induced Erratic Operations

    9.6.6 Others Although the basic reliability of the S1V3G340 is designed to comply with EIAJ and MIL standards, please pay careful attention to the following points when actually mounting the chip on a board.

  • Page 44: Revision History

    Revision History Revision History Revision details Date Rev. Page Type Details 03/06/2009 Newly established S1V3G340 Hardware Specification EPSON (Rev. 1.0) Downloaded from Elcodis.com electronic components distributor...
  • Page 45 20/F, Harbour Centre, 25 Harbour Road, Wanchai, Hong Kong Phone: +852-2585-4600 FAX: +852-2827-4346 Telex: 65542 EPSCO HX EPSON TAIWAN TECHNOLOGY & TRADING LTD. 14F, No. 7, Song Ren Road, Taipei 110, TAIWAN Phone: +886-2-8786-6688 FAX: +886-2-8786-6660 EPSON SINGAPORE PTE., LTD.

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