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4. Appearance of evaluation board
This chapter provides an exterior view of TCKE8xx series EVB.
PCB layout guidelines
・Keep all wiring as short as possible to minimize the effects of parasitic components.
・Install CIN and COUT as close to IC as possible to obtain a stable power supply.
・Wider VIN, VOUT, GND wires can reduce the effects of thermal impedances and parasitic components.
・By separating the small-signal GND from the power GND, the effect of noises caused by the return
current can be reduced.
© 2023
Toshiba Electronic Devices & Storage Corporation
This is a reference material. Do not design the final equipment in this document.
TCKE8xx series Evaluation Board Instruction Manual
Figure 5-1 Front side
Figure 5-2 Back side
5
2023-5-10
Rev.1.0
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