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TTS 58AXPJ
Model 58BXPJ
Section 4
SECTION 4
CIRCUIT DESCRIPTION
4. l
The 1kHz signal connected to the
input is ac coupled by transformer T -1
.
The secondary is connected to a low-pass
filter and the input signal subsequently
applied to the AMP-LIMITER (Ul, Ql and
QZ).
4. 2
The waveform at the output of the
AMP-LIMITER is a rectangular pulse and
is applied to a divide by two, (t UZ)
.
The
complimentary outputs of the divide by two
are connected to two separate phase shift
detectors.
4
.xJc
_
A local oscillator
y
ith a frequency
rw:ce
that of the incoming input signal is
connected to a divide by two, (tUZ) with it's
complimentary outputs, in turn, applied to
two other divide by two intergrated circuits
(U3)
.
4
.
4
One half of U3 provides a signal in
quadrature with the input signal to the phase
d~tector enclosed in the lock loop.
The out-
put signal is averaged, filtered, amplified
=::::::::::
and the resulting sign:al used to control the
local voltage controlled
o_
scillator.
The
response of the lock loop is essentially
speeded up when switch S-7 is in the ADJ.
FOR MINIMUM position.
This fast response
facilitates locking the local oscillator to the
input signal frequency
.
4. 5
With switch S-7 in the READ position,
the lock loop response is slow enough to
allow measurement of phase jitter with low
modulation frequencies.
Typically as low
as 10Hz.
4
.
6
The other half of U3 is connected to the
other phase detector
.
The width of the
rectangular pulse appearing at the
outpu·
t of
this phase detector varies with the phase shift
of the incoming signal.
This pulse is applied
to a circuit which converts the pulse width
variations to peak amplitude variations
(QlO and Qll).
waveshape appearing at the
output of the pulse width to amplitude modu-
lation converter is sawtooth in nature and is
applied to a buffer circuit Ql3 providing an
output signal for phase hits detection.
4
.
7
This same sawtooth is also applied
to a peak detector (tU6), with the resulting
output de. component
appli_
ed to the D. C
.
Log converter, ( tu6, Q6 and Q7).
The
de output of the log converter is applied to
a de amplifier (U7), driving the meter
.
4.8
ThetransistorsQ8,
Q9,
Ql6, andQl7
constitute a phase correction detector circuit
providing for the correct polarity at the output
ofthe PHASE DETECTOR CIRCUIT (tU4)
.
4-l
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