Mitsubishi Electric AJ71QC24 Manual page 126

Melsec qna serial communications module
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6. BIDIRECTIONAL
PROTOCOL
COMMUNICATIONS
MELSEC QnA
6.5.4
Summary of data transmission from PC CPU using bidirec-
tional protocol
The following uses an image diagram to outline data transmission from the PC CPU using the
bidirectional protocol described in Section 6.5.3.
X0 turned ON
External devlce
When X0
IS
turned ON, the PC CPU
SET
Y90
When X1 is turned ON, the PC CPU
turns ON the Request to Send slqnal
@ The PC CPU uses the sequence program
TO
instruction (*BIDOUT instruction) to write
the data to the QC24 buffer memory.
@ When the Request to Send signal
(Y80) is turned ON, the QC24 sends the data code
to the external device as is.
@ The external device checks the receive data and sends a response (result
of reception)
to the QC24.
@ When the QC24 receives the response, it turns ON the End of Transmission signal
(X80) and ends one data transmission.
*
: The BIDOUT instruction automatically turns the QC24 Request to Send and End of
Transmission signals ON and OFF by internal processing. The sequence program
does not have to turn these signals ON and OFF.
PC CPU
r q
Sequence
Step O
END
Step 0
Request to Send
I I
signal
("80)
I I
I
\
End of Transmissi
I
6 - 1 5

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