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(i)
Control register #19
7
6
5
4
#19
*1 If the built>in patterns are valid, 0 to 2 ( ©000π to ©010π ) can be selected.
X©00π is set whenever the power is turned on or when the initial state is specified by
the CLEAR command.
6 $ 18
LSB
3
2
1
0
0
0
Read density step specification
0: Eight steps (Control register #1 is valid.)
1: 256 steps
Halftone processing method specification
0: Dithering
1: Error diffusion
d pattern number specification
0 0 0 : Normal
0 0 1 : Soft
0 1 0 : Sharp
0 1 1 :
1 0 0
1 0 1
1 1 0
1 1 1
Downloaded or built>in d patterns
0: The patterns built into the device are valid.
1: The downloaded patterns are valid.
50FH5037E>02
(Control register #20 is valid.)
Three types (0 to 2) if the
built>in patterns are valid.
Eight types (0 to 7) if
downloading is enabled.
(*1)
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