Related Manuals for Fujitsu SK-86R12-CPU01
Summary of Contents for Fujitsu SK-86R12-CPU01
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Page 1: Cpu Module
Fujitsu Semiconductor Europe FSEUGCC-UM_SK-86R12-CPU01_Rev1.1 User Manual EMERALD-P CPU MODULE SK-86R12-CPU01 USERGUIDE... -
Page 2: Revision History
Issue 30 Nov 2011 V1.0 Herbert Hönig First release 07 Dec 2011 V1.01 Herbert Hoenig Corrected typo 12 Jan 2012 V1.1 Herbert Hönig Added PSMODE information This document contains 11 pages. FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 2 - © Fujitsu Semiconductor Europe GmbH... -
Page 3: Warranty And Disclaimer
Product or parts thereof, if the Product is returned to Fujitsu Semiconductor Europe GmbH in original packing and without further defects resulting from the customer´s use or the transport. -
Page 4: Table Of Contents
NAND / NOR Boot Option ....................8 DIP Switches .......................... 8 Power presets ........................10 USB HOST ........................... 10 LEDs ............................. 10 Appendix .......................... 11 Used literature ........................11 Figures ..........................11 FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 4 - © Fujitsu Semiconductor Europe GmbH... -
Page 5: Introduction / Features
Emerald-P CPU Module SK-86R12-CPU01 0 Introduction / Features Here you will find a short summary and overview of the features that the SK-86R12-CPU01 Module offers. It provides 3x APIX2 Video Outputs, 1x APIX2 Video Input 1x USB Host JTAG/Trace Debug Connectors (20 Pin + Mictor Connector) -
Page 6: System Overview
SK-86R12-CPU01 1 System Overview The Emerald-P system consists of three modules: CPU module (Emerald-P chip, USB connector): SK-86R12-CPU01 Base board (supplies interfaces and power): SK-86R11-BASE Additional Addon board (from Jade-L system), provides 2x DVI output and 2x CVBS input : SK-86R03-VIDEO Figure 1-1: System Overview FSEUGCC-UM_MB86R12-CPU01_Rev1.1... -
Page 7: Startup Cpu Module
Demo starts up on HDMI output Default settings for the CPU Module : Clock PLL set to 533MHZ NOR Flash boot activated Bootloader and Linux system flashed in NOR and NAND Flash Figure 2-1: Board Layout FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 7 - © Fujitsu Semiconductor Europe GmbH... -
Page 8: Detailed Settings
ON = PLL clock frequency divider ratio = 1 VINITHI ON = Exception Vectors located at 0xFFFF0000 OFF = Exception Vectors located at 0x00000000 Unused Notes: CRIPM[0:3] default settings results in 533 MHz clock frequency FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 8 - © Fujitsu Semiconductor Europe GmbH... - Page 9 ON = use OFF = not in use (Default) Notes: MPX Mode Settings also available on Main Connector A Attention: Do not set SW12-7 and SW12-8 to ON at the same time! FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 9 - © Fujitsu Semiconductor Europe GmbH...
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Page 10: Power Presets
1.2V supply to MB86R12 (general) 5V Supply to USB bus Global 3.3V Supply from base board connector 3.3V supply to MB86R12 (general) 1.5V supply to DDR3 memory 3.3V supply to MB86R12 (general) FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 10 - © Fujitsu Semiconductor Europe GmbH... -
Page 11: Appendix
Software Update: Please check Website regularly for updates of the used Linux system http://www.fujitsu.com/emea/services/microelectronics/gdc/swtools/gdc-software- index.html 4.2 Figures Figure 1-1: System Overview ..........................6 Figure 2-1: Board Layout ............................7 FSEUGCC-UM_MB86R12-CPU01_Rev1.1 - 11 - © Fujitsu Semiconductor Europe GmbH...