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68EVB912B32UM/D
February 1997
M68EVB912B32

EVALUATION BOARD

USER'S MANUAL
© MOTOROLA Inc., 1997; All Rights Reserved

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Summary of Contents for Motorola M68EVB912B32

  • Page 1: Evaluation Board

    68EVB912B32UM/D February 1997 M68EVB912B32 EVALUATION BOARD USER’S MANUAL © MOTOROLA Inc., 1997; All Rights Reserved...
  • Page 2 Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur.
  • Page 3: Table Of Contents

    CONTENTS TABLE OF CONTENTS CHAPTER 1 GENERAL INFORMATION 1.1 INTRODUCTION......................1-1 1.2 GENERAL DESCRIPTION AND FEATURES..............1-1 1.3 FUNCTIONAL OVERVIEW .................... 1-4 1.4 EXTERNAL EQUPMENT REQUIREMENTS ..............1-7 1.5 EVB SPECIFICATIONS ....................1-8 1.6 CUSTOMER SUPPORT....................1-9 CHAPTER 2 CONFIGURATION AND SETUP 2.1 UNPACKING AND PREPARATION ................
  • Page 4 CONTENTS 3.2.1 Startup Procedure......................3-4 3.2.2 Operating Procedures....................3-5 3.2.2.1 EVB Mode......................3-5 3.2.2.2 JUMP-EEPROM Mode ..................3-5 3.2.2.3 POD Mode......................3-6 3.2.2.4 BOOTLOAD Mode....................3-7 3.3 RESET..........................3-7 3.4 ABORTING A USER PROGRAM ................... 3-8 3.5 USING D-BUG12 COMMANDS..................3-8 3.5.1 Command-Line Prompt ....................
  • Page 5 CONTENTS Stop Execution on Target MCU ..................3-50 Trace ............................ 3-51 Display Memory in S-Record Format.................. 3-53 Verify S-Record File against Memory................. 3-54 Modify Register Value......................3-56 3.7 OFF-BOARD CODE GENERATION................3-59 3.8 MEMORY USAGE......................3-59 3.8.1 Description........................3-59 3.8.2 Memory Map ......................3-60 3.9 OPERATIONAL LIMITATIONS..................
  • Page 6 CONTENTS APPENDIX B COMMUNICATIONS PROGRAM EXAMPLES INTRODUCTION .........................B-1 PROCOMM FOR DOS — IBM PC..................B-1 Setup ..........................B-1 S-Record Transfers to EVB Memory ................B-3 KERMIT FOR DOS — IBM PC...................B-3 Setup ..........................B-3 S-Record Transfers to EVB Memory ................B-3 KERMIT — SUN WORKSTATION..................B-5 Setup ..........................B-5 S-Record Transfers to EVB Memory ................B-5 MACTERMINAL —...
  • Page 7 CONTENTS VECTOR JUMP TABLE: INTERRUPT AND RESET ADDRESSES ......E-4 RELOADING AND CUSTOMIZING D-BUG12..............E-5 Obtaining D-Bug12 Upgrades ................... E-6 Reloading D-Bug12 ......................E-6 Customizing D-Bug12....................... E-6 INDEX LIST OF ILLUSTRATIONS Figure 1-1. EVB Layout and Component Placement ..............1-3 Figure 1-2.
  • Page 8 CONTENTS viii 68EVB912B32UM/D...
  • Page 9: Chapter 1 General Information

    CHAPTER 1 GENERAL INFORMATION 1.1 INTRODUCTION This manual provides the necessary information for using the M68EVB912B32 Evaluation Board (the EVB), an evaluation, debugging, and code-generation tool for the MC68HC912B32 Microcontroller Unit (MCU) devices. The manual includes: • A general description of the EVB •...
  • Page 10 GENERAL INFORMATION • Header footprints for access to all MCU pins • 16-MHz crystal for 8-MHz bus operation • Headers for jumper selection of and connection to hardware options: − RS-232 isolation (W1, W2)) − EVB mode selection (W3, W4) −...
  • Page 11: Figure 1-1. Evb Layout And Component Placement

    GENERAL INFORMATION Figure 1-1. EVB Layout and Component Placement 68EVB912B32UM/D...
  • Page 12: Functional Overview

    GENERAL INFORMATION Figure 1-2. EVB Solder Side View 1.3 FUNCTIONAL OVERVIEW The EVB is factory-configured to execute D-Bug12, the Flash EEPROM-resident monitor program, without further configuration by the user. It is ready for use with an RS-232C terminal for writing and debugging user code. Follow the setup instructions in Chapter 2 to prepare for operation.
  • Page 13 SCI port becomes available for user applications. This mode requires either: • another M68EVB912B32 and a host computer • a background debug development tool, such as Motorola’s Serial Debug Interface (SDI) For more information, refer to the Motorola Serial Debug Interface User’s Manual.
  • Page 14: External Equpment Requirements

    If no external MCU is detected, the software informs the user. The target’s EEPROM may be programmed while the host M68EVB912B32 board is in EVB mode, using the D-Bug12 commands BULK, LOAD, FBULK and FLOAD.
  • Page 15: Evb Specifications

    GENERAL INFORMATION For full details of equipment setup, cabling, and special requirements, refer to Chapter 2. 1.5 EVB SPECIFICATIONS Table 1-1 lists the EVB specifications. Table 1-1. EVB Specifications Characteristic Specifications MC68HC912B32 MCU I/O ports HCMOS compatible Background Debug Mode two 2x3 headers interface (IN and OUT) Communications port...
  • Page 16: Customer Support

    ISRAEL Taipei – 886(2)717-7089 Herzlia – 972-9-590222 THAILAND ITALY Bangkok – 66(2)254-4910 Milan – 39(2)82201 UNITED KINGDOM Aylesbury – 44 1 (296)395252 UNITED STATES Phoenix, AZ – 1-800-441-2447 For a list of the Motorola sales offices and distributors: http://www.mcu.mot.sps.com 68EVB912B32UM/D...
  • Page 17: Chapter 2 Configuration And Setup

    CONFIGURATION AND SETUP 2.1 UNPACKING AND PREPARATION Verify that the following items are present in the EVB package: • The M68EVB912B32 board assembly • Background Debug Mode(BDM) interface cable, 6-pin to 6-pin • Warranty and registration cards • EVB schematic diagram and parts list •...
  • Page 18: Evb To Power Supply Connection

    CONFIGURATION AND SETUP Table 2-1. EVB Startup Mode Jumpers Jumper Startup Mode Positions EVB execution mode (default). D-Bug12 is executed from Flash EEPROM upon reset. The D-Bug12 prompt appears immediately on the terminal display. JUMP-EEPROM mode. User code is executed from byte-erasable EEPROM upon reset. For more information, refer to 3.1 Operating Modes.
  • Page 19: Table 2-2. Rs-232C Interface Cabling

    This setup makes the SCI port available for user applications. Additional hardware and software are required. For more information, refer to the documentation for the background debug development tool being used. This can be another M68EVB912B32 or a tool such as Motorola’s Serial Debug Interface (SDI).
  • Page 20: Terminal Communications Setup

    EVB’s memory. It is thus desirable for the host to be capable of running programs such as P&E Microcomputer Systems' IASM12 or Motorola’s MCUasm assembler. For more information, refer to 3.7 Off-Board Code Generation.
  • Page 21: Changing The Baud Rate

    CONFIGURATION AND SETUP 2.5.4 Changing the Baud Rate The EVB’s default baud rate for the RS-232C port is 9600. This can be changed in two ways: • For temporary changes, use the D-Bug12 BAUD command. This change remains in effect only until the next reset or power-up, at which time the baud rate returns to 9600.
  • Page 22 CONFIGURATION AND SETUP 68EVB912B32UM/D...
  • Page 23: Chapter 3 Operation

    The operating mode is determined by jumper headers W3 and W4, as shown in Table 4-1. The modes are described in the following three sections. NOTE When operating in EVB mode, the M68EVB912B32 cannot fully emulate a target system. The limitations are described in 3.9 Operational Limitations.
  • Page 24: Pod (Probe) Mode

    BDM interface is non-intrusive upon the target’s foreground operation. The target’s on-chip resources are all available for the application. The target may be a second M68EVB912B32 board or any other M68HC12 system. D-Bug12 commands are entered as usual on the user terminal, which is served by the POD EVB.
  • Page 25: Programming The Target's Eeprom

    3.2.1 Startup Procedure The following startup procedure includes a checklist of configuration and setup items. To begin operating the M68EVB912B32, follow these steps:: 1. Configure the EVB if required — section 2.2. 2. Determine whether execution should begin in EVB mode (page 3-1), JUMP- EEPROM mode (page 3-2), POD mode (page 3-2), or BOOTLOAD mode (page3-3).
  • Page 26: Operating Procedures

    D-Bug12  upon reset, the D-Bug12 sign-on banner and prompt should appear on the terminal’s display as follows: D-Bug12 v 2.0.0 Copyright 1996 - 1997 Motorola Semiconductor For Commands type "Help" > If the prompt does not appear, check all connections and verify that startup steps 1 through 7 in section 3.2.1 have been performed correctly.
  • Page 27: Pod Mode

    D-Bug12 sign-on banner and prompt should appear on the terminal’s display as follows: D-Bug12 v 2.0.0 Copyright 1996 - 1997 Motorola Semiconductor For Commands type "Help" S> If communications cannot be established with the target system after repeated attempts, check for the following possible problems: •...
  • Page 28: Bootload Mode

    OPERATION Single Chip mode. Resetting the target MCU in Special Single Chip mode places it in active background mode. See the target MCU’s technical summary for details on setting the MCU operating mode. Special D-Bug12 command-line prompts indicate the status of the target system: target is in active background mode S>...
  • Page 29: Using D-Bug12 Commands

    OPERATION When operating in POD mode, the D-Bug12 RESET or STOP command can be used to regain control of the target system. 3.5 USING D-BUG12 COMMANDS D-Bug12, the EVB’s firmware-resident monitor program, provides a self-contained operating environment that allows writing, evaluation, and debugging of user programs. 3.5.1 Command-Line Prompt D-Bug12 displays one of three command-line prompts, depending upon its operating mode and/or the state of the target system.
  • Page 30: Command-Set Summary

    OPERATION <parameter> is an expression or address. <ENTER> is the terminal keyboard’s carriage-return or enter key. NOTES 1. The command-line syntax is illustrated using the following special characters for clarification. Do not type these characters on the command line: < > required syntactical element optional field ...[ ]...
  • Page 31 OPERATION Table 3-1. D-Bug12 Command-Set Summary (continued) Command Description CALL [<Address>] Execute a user subroutine; return to D-Bug12 when finished DEVICE [ see description ] Select/define a new target MCU device EEBASE <Address> Inform D-Bug12 of the target’s EEPROM base address FBULK Erase the target processor’s on-chip Flash EEPROM FLOAD <AddressOffset>...
  • Page 32: D-Bug12 Command Set

    OPERATION Table 3-1. D-Bug12 Command-Set Summary (continued) Command Description T [<Count>] Trace — execute an instruction, disassemble it, and display the CPU registers UPLOAD <StartAddress> <EndAddress> Display memory contents in S-Record format* VERF [<AddressOffset>] Verify memory contents against S-Record Data <RegisterName>...
  • Page 33: Assembler/Disassembler

    OPERATION Assembler/Disassembler syntax: <Address> where: <Address> is a 16-bit hexadecimal number. The assembler/disassembler is an interactive memory editor that allows memory contents to be viewed and altered using assembly language mnemonics. Each entered source line is translated into object code and placed into memory at the time of entry. When displaying memory contents, each instruction is disassembled into its source mnemonic form and displayed along with the hexadecimal object code and any instruction operands.
  • Page 34: Table 3-2. M68Hc11 To Cpu12 Instruction Translation

    OPERATION The assembly/disassembly process may be terminated by entering a period (.) as the first non- space character following the assembler prompt. restrictions: None. Table 3-2. M68HC11 to CPU12 Instruction Translation M68HC11 Mnemonic CPU12 Instruction M68HC11 Mnemonic CPU12 Instruction ANCC # $FE LEAS 1, S ANCC # $EF TFR A, CC...
  • Page 35 OPERATION Hexadecimal numbers must be entered with a leading dollar sign ($) followed by one to four hexadecimal digits. The default number base is decimal. For all branching instructions (Bcc, LBcc, BRSET, BRCLR, DBEQ, DBNE, IBEQ, IBNE, TBEQ, and TBNE), the number entered as the branch address portion of the operand field is the absolute address of the branch destination.
  • Page 36: Set Baud Rate

    OPERATION BAUD Set Baud Rate BAUD syntax: BAUD <BAUDRate> where: <BAUDRate> is an unsigned 16-bit decimal number. The BAUD command is used to change the communications rate of the SCI used by D-Bug12 for the terminal interface. restrictions: Because the <BAUDRate> parameter supplied on the command line is a 16-bit unsigned integer, BAUD rates greater than 65535 baud cannot be set using this command.
  • Page 37: Block Fill

    OPERATION Block Fill syntax: <StartAddress> <EndAddress> [<Data>] where: <StartAddress> is a 16-bit hexadecimal number. <EndAddress> is a 16-bit hexadecimal number. <Data> is an 8-bit hexadecimal number. The Block Fill command is used to place a single 8-bit value into a range of memory locations. <StartAddress>...
  • Page 38: Breakpoint Set

    OPERATION Breakpoint Set syntax: [<Address> <Address> ...] where: <Address> are optional 16-bit hexadecimal numbers. The BR command is used to set a software breakpoint at a specified address or to display any previously set breakpoints. The function of a breakpoint is to halt user program execution when the program reaches the breakpoint address.
  • Page 39 OPERATION example: >BR 35ec 2f80 c592 Breakpoints: 35EC 2F80 C592 >BR Breakpoints: 35EC 2F80 C592 > 68EVB912B32UM/D 3-17...
  • Page 40: Bulk Erase Eeprom

    OPERATION BULK Bulk Erase EEPROM BULK syntax: BULK The BULK command is used to erase the entire contents of byte-erasable EEPROM in a single operation. After the bulk erase operation has been performed, each on-chip EEPROM location is checked for an erased condition. restrictions: In order to erase EEPROM, the EEPROM block-protect control bits must be cleared.
  • Page 41: Call Subroutine

    OPERATION CALL Call Subroutine CALL syntax: CALL [<Address>] where: <Address> is an optional 16-bit hexadecimal number. The CALL command is used to execute a subroutine and return to the D-Bug12 monitor program when the final RTS of the subroutine is executed. When control is returned to D-Bug12, the CPU register contents are displayed.
  • Page 42: Specify Target Mcu Device

    OPERATION DEVICE Specify Target MCU Device DEVICE syntax: DEVICE DEVICE <DeviceName> [<EEStart> <EEEnd> <FStart> <FEnd> <RAMStart> <RAMEnd> <IOBase>] where: <DeviceName> is the maximum of 7 ASCII characters used to select/define a target MCU device. <EEStart> is the on-chip EEPROM starting address; a 16-bit hexadecimal number.
  • Page 43 EEPROM, new device information and the device selection are retained when power is removed from the POD. If the M68EVB912B32 is operated in EVB mode and the contents of any locations of the on-chip EEPROM are altered it is strongly recommended that the on-chip EEPROM be completely erased by using the BULK command before using the EVB in POD mode again.
  • Page 44 OPERATION example: >DEVICE Device: 912B32 EEPROM: $0D00 - $0FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $0000 S>DEVICE 912b32 1d00 1fff 8000 ffff 800 bff 0 Device: 912B32 EEPROM: $1D00 - $1FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $0000 S>DEVICE 812a4 Device: 812A4...
  • Page 45: Specify Target Eeprom Base Address

    OPERATION EEBASE Specify Target EEPROM EEBASE Base Address syntax: EEBASE <Address> where: <Address> is an optional 16-bit hexadecimal number. Each time D-Bug12 performs a memory write, it automatically performs the necessary register manipulations to program the on-chip EEPROM if the write operation falls within the address range of the target’s on-chip EEPROM.
  • Page 46 OPERATION example: S>DEVICE Device: 912B32 EEPROM: $0D00 - $0FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $0000 S>EEBASE 1d00 Device: 912B32 EEPROM: $1D00 - $1FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $0000 S>MM 12 0012 01 11 0013 0F .
  • Page 47: Erase Target Flash Eeprom

    Flash EEPROM programming voltage (Vpp) must be applied to the target MCU. If the target system is another M68EVB912B32 board, Vpp may be supplied via header W8, with header W7 set accordingly. For more information on these EVB headers, see Table 4-1.
  • Page 48 OPERATION example: S>FBULK Flash Programming Voltage Not Present S>FBULK F/EEPROM Failed To Erase S>FBULK S> >FBULK Command Not Allowed In EVB Mode > 3-26 68EVB912B32UM/D...
  • Page 49: Program Target Flash Eeprom

    OPERATION FLOAD Program Target Flash FLOAD EEPROM syntax: FLOAD [<AddressOffset>] where: <AddressOffset> is a 16-bit hexadecimal number. The FLOAD command is used to program a target device’s Flash EEPROM memory with the data contained in S-Record object files. The address offset, if supplied, is added to the load address of each S-Record before the S-Record’s data bytes are placed in memory.
  • Page 50 Flash EEPROM programming voltage (Vpp) must be applied to the target MCU. If the target system is another M68EVB912B32 board, Vpp may be supplied via header W8, with header W7 set accordingly. For more information on these EVB headers, see Table 4-1.
  • Page 51: Go Execute A User Program

    OPERATION Go Execute a User Program syntax: [<Address>] where: <Address> is an optional 16-bit hexadecimal number. The G command is used to begin the execution of user code in real time. Before beginning execution of user code, any breakpoints that were set with the BR command are placed in memory.
  • Page 52: Go Till

    OPERATION Go Till syntax: <Address> where: <Address> is a 16-bit hexadecimal number. The GT command is similar to the G command except that a temporary breakpoint is placed at the address supplied on the command line. Any breakpoints that were set by the use of the BR command are NOT placed in the user code before program execution begins.
  • Page 53: Onscreen Help Summary

    OPERATION HELP Onscreen Help Summary HELP syntax: HELP The HELP command is used to display a summary of the D-Bug12 command set. Each command is shown along with its command line format and a brief description of its function. restrictions: None.
  • Page 54 OPERATION example: >HELP ASM <Address> Single line assembler/disassembler <CR> Disassemble next instruction <.> Exit assembly/disassembly BAUD <baudrate> Set communications rate for the terminal BF <StartAddress> <EndAddress> [<data>] Fill memory with data BR [<Address>] Set/Display user breakpoints BULK Erase entire on-chip EEPROM contents CALL [<Address>] Call user subroutine at <Address>...
  • Page 55: Load S-Record File

    OPERATION LOAD Load S-Record File LOAD syntax: LOAD [<AddressOffset>] { Send File } where: <AddressOffset> is an optional 16-bit hexadecimal number. {Send File} is the host-computer communications program’s utility for sending an ASCII (text) file. Refer to Appendix B  Communications Program Examples.
  • Page 56: Memory Display

    OPERATION Memory Display syntax: <StartAddress> [<EndAddress>] where: <StartAddress> is a 16-bit hexadecimal number. <EndAddress> is an optional 16-bit hexadecimal number. The Memory Display command displays the contents of memory as both hexadecimal bytes and ASCII characters, 16-bytes on each line. The <StartAddress> parameter must be supplied; the <EndAddress>...
  • Page 57: Memory Display, Word

    OPERATION Memory Display, Word syntax: <StartAddress> [<EndAddress>] where: <StartAddress> is a 16-bit hexadecimal number. <EndAddress> is an optional 16-bit hexadecimal number. The Memory Display Word command displays the contents of memory as hexadecimal words and ASCII characters, 16-bytes on each line. The <StartAddress> parameter must be supplied; the <EndAddress>...
  • Page 58: Memory Modify

    OPERATION Memory Modify syntax: <Address> [<Data>] where: <Address> is a16-bit hexadecimal number. <Data> is an optional 8-bit hexadecimal number. The Memory Modify command allows the contents of memory to be examined and/or modified as 8-bit hexadecimal data. If the 8-bit data parameter is present on the command line, the byte at memory location <Address>...
  • Page 59 OPERATION example: >MM 800 0800 <CR> 0801 0802 0801 <CR> 0802 <CR> 0803 55 / 0803 > 68EVB912B32UM/D 3-37...
  • Page 60: Memory Modify, Word

    OPERATION Memory Modify, Word syntax: <Address> [<Data>] where: <Address> is a 16-bit hexadecimal number. <Data> is an optional 16-bit hexadecimal number. The Memory Modify Word command allows the contents of memory to be examined and/or modified as 16-bit hexadecimal data. If the 16-bit data parameter is present on the command line, the word at memory location <Address>...
  • Page 61 OPERATION example: >MMW 800 0800 00F0 <CR> 0802 0008 AA55 / 0804 843F 0802 AA55 <CR> 0804 843F <CR> 0806 C000 > 68EVB912B32UM/D 3-39...
  • Page 62: Move Memory Block

    OPERATION MOVE Move Memory Block MOVE syntax: MOVE <StartAddress> <EndAddress> <DestAddress> where: <StartAddress> is a 16-bit hexadecimal number. <EndAddress> is a 16-bit hexadecimal number. <DestAddress> is a 16-bit hexadecimal number. The MOVE command is used to move a block of memory from one location to another, one byte at a time.
  • Page 63: Remove Breakpoints

    OPERATION NOBR Remove Breakpoints NOBR syntax: NOBR [<Address> <Address> ...] where: <Address> is an optional 16-bit hexadecimal number. The NOBR command can be used to remove one or more previously entered breakpoints. If the NOBR command is entered without any arguments, all user breakpoints are removed from the breakpoint table.
  • Page 64: Register Display

    OPERATION Register Display syntax: The Register Display command is used to display the CPU12’s registers. restrictions: When operating in POD mode, the CPU registers may not be displayed when the "R>" prompt is displayed. example: >RD D = A:B CCR = SXHI NZVC 0206 03FF 1000...
  • Page 65: Specify Target Eeprom Register Address

    OPERATION REGBASE Specify Target EEPROM REGBASE Register Address syntax: REGBASE <Address> where: <Address> is a 16-bit hexadecimal number. Because D-Bug12 supports the ability to transparently program the on-chip EEPROM of the target MCU, it must know the base address of the I/O registers. Because user code may change the register block’s base address by writing to the INITRG register, D-Bug12 must be informed of the register block’s base address for transparent EEPROM writes to occur.
  • Page 66 OPERATION example: S>DEVICE Device: 912B32 EEPROM: $0D00 - $0FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $0000 S>REGBASE 2000 Device: 912B32 EEPROM: $0D00 - $0FFF Flash: $8000 - $FFFF RAM: $0800 - $0BFF I/O Regs: $2000 S> 3-44 68EVB912B32UM/D...
  • Page 67: Reset Target Mcu

    OPERATION RESET Reset Target MCU RESET syntax: RESET The RESET command is used to reset the target system processor when operating in D-Bug12’s POD mode. The target processor’s reset pin is held byte-erasable for approximately 2 mS. When the reset line is released, BDM commands are sent to the target processor to place it in active background mode.
  • Page 68: Register Modify

    OPERATION Register Modify syntax: The Register Modify command is used to examine and/or modify the contents of the CPU12’s registers in an interactive manner. As each register and its contents is displayed, D-Bug12 allows the user to enter a new value for the register in hexadecimal. If modification of the displayed register is not desired, entering a carriage return will cause the next CPU12 register and its contents to be displayed on the next line.
  • Page 69: Stop Execution On Target Mcu

    OPERATION STOP Stop Execution on Target STOP syntax: STOP When operating in D-Bug12’s POD mode, the STOP command is used to halt target program execution and place the target processor in active Background Debug Mode. restrictions: When operating in the EVB mode, the STOP command cannot be used. If the STOP command is entered while in EVB mode, an error message is displayed and command execution is terminated.
  • Page 70: Trace

    OPERATION Trace syntax: [<Count>] where: <Count> is an optional 8-bit decimal number in the range 1 to 255. The Trace command is used to execute one or more user program instructions beginning at the current Program Counter (PC) location. As each program instruction is executed, the CPU12’s register contents are displayed and the next instruction to be executed is displayed.
  • Page 71 OPERATION example: >T D=A:B CCR=SXHI NZVC 0803 09FE 057C 0000 10:00 1001 0000 0803 830001 SUBD #$0001 >T 3 D=A:B CCR=SXHI NZVC 0806 09FE 057C 0000 0F:FF 1001 0000 0806 26FB $0803 D=A:B CCR=SXHI NZVC 0803 09FE 057C 0000 0F:FF 1001 0000 0803 830001 SUBD...
  • Page 72: Display Memory In S-Record Format

    <EndAddress> is a 16-bit hexadecimal number. The UPLOAD command is used to display the contents of memory in Motorola S-Record format. In addition to displaying the specified range of memory, the UPLOAD command also outputs an S9 end-of-file record. The output of this command may be captured by the users terminal program and saved to a disk file.
  • Page 73: Verify S-Record File Against Memory

    OPERATION VERF Verify S-Record File against Memory VERF syntax: VERF [<AddressOffset>] { Send File } where: <AddressOffset> is an optional 16-bit hexadecimal number. {Send File} is the host-computer communications program’s utility for sending an ASCII (text) file. Refer to Appendix B  Communications Program Examples.
  • Page 74: Modify Register Value

    OPERATION <Register Name> Modify Register Value <Register Name> syntax: <RegisterName> <RegisterValue> where: <RegisterName> is one of the CPU12 registers listed in Table 3-3. <RegisterValue> is an 8- or 16-bit hexadecimal number. Table 3-3. CPU12 Registers Register Name Description Legal Range Program Counter $0 to $FFFF Stack Pointer...
  • Page 75 OPERATION Table 3-4. Condition Code Register Bits (continued) CCR Bit Name Description Legal Values Two’s Complement Overflow Flag 0 or 1 Carry Flag 0 or 1 IRQ Interrupt Mask 0 or 1 XIRQ Interrupt Mask 0 or 1 This set of "commands" uses a CPU12 register name as the command name to allow changing the register’s contents.
  • Page 76: Off-Board Code Generation

    OPERATION 3.7 OFF-BOARD CODE GENERATION Code developed outside the EVB environment should be generated with an M68HC12- compatible assembler or C compiler that can generate object files in S-Record format. The recommended assembler, P&E Microcomputer Systems’ IASM12, is supplied with the EVB package on the diskette labeled "IASM12."...
  • Page 77: Memory Map

    OPERATION NOTE D-Bug12 sets the default value of the user’s stack pointer to $0A00. This is not a mistake. The M68HC12’s stack pointer points to the last byte that was pushed onto the stack, rather than to the next available byte on the stack, as the M68HC11 does. The M68HC12 first decrements its stack pointer, then stores data on the stack.
  • Page 78: On-Chip Ram

    OPERATION 3.9.1 On-Chip RAM D-Bug12 requires 512 bytes of on-chip RAM for stack and variable storage. This usage is shown in Table 3-5. 3.9.2 On-Chip EEPROM D-Bug12 occupies Flash EEPROM starting at address $8000, as shown in Table 3-5. This area is thus not available for emulation of a target application.
  • Page 79: Terminal Communications

    OPERATION 3.9.5 Terminal Communications High baud rates occasionally result in dropped characters on the terminal display. This is not the result of a baud rate mismatch; it is due to the host processor being too busy or too slow to process incoming data at the selected baud rate.
  • Page 80 OPERATION 3-58 68EVB912B32UM/D...
  • Page 81: Chapter 4 Hardware Reference

    HARDWARE REFERENCE CHAPTER 4 HARDWARE REFERENCE 4.1 PCB DESCRIPTION The EVB printed circuit board (PCB) is a 5.15 by 3.4 inch (13.1 by 8.64 cm) board with two layers. Most of the connection points on the EVB use headers spaced on 1/10-inch (2.54 mm) centers, with the following exceptions: •...
  • Page 82: Table 4-1. Jumper And Header Functions

    HARDWARE REFERENCE CAUTION When cutting a PCB trace to customize a header footprint, use a sharp blade. Be careful to avoid personal injury and not to cut adjacent traces. Key to Table 4-1: Headers are depicted as viewed from either the component side as shown in Figure 1-1 or the solder side as shown in Figure 1-2.
  • Page 83 HARDWARE REFERENCE Table 4-1. Jumper and Header Functions (continued) Diagram Pins Description W3, W4 EVB Mode Selection W3-0 EVB mode  execution from Flash EEPROM (D-Bug12 default) W4-0 W3-1 Jump to EEPROM mode W4-0 W3-0 POD mode  remote BDM W4-1 W3-1 BOOTLOAD mode...
  • Page 84: Power Input Circuitry

    HARDWARE REFERENCE Table 4-1. Jumper and Header Functions (continued) Diagram Pins Description Vdd Connection to BDM OUT Connects Vdd to BDM OUT pin 6 BDM OUT pin 6 open Reset Connection to BDM OUT Connects MCU-generated reset (PT6) to BDM OUT pin 4 BDM OUT pin 4 open BDM OUT BKGD output from MCU PT7...
  • Page 85: Terminal Interface

    HARDWARE REFERENCE 4.4 TERMINAL INTERFACE An RS-232C transceiver (U1A or U1B) links the MCU’s Serial Communications Interface to the RS-232C DB-9 receptacle, P1. The communications parameters for this port are described in 2.5 Terminal Communications Setup. 4.5 MICROCONTROLLER The MC68HC912B32 is the first of a family of next generation M68HC11 microcontrollers with both on-chip memory and peripheral functions.
  • Page 86: Clock Circuitry

    Note that header W15 may be used to provide an alternate reset input. 4.8 LOW-VOLTAGE INHIBIT Low voltage inhibition (LVI) uses a Motorola undervoltage sensing device (U1) to automatically drive the MCU’s RESET* pin low when Vdd falls below U1's threshold. This prevents the accidental corruption of EEPROM data if the power-supply voltage should drop below the allowable level.
  • Page 87: Prototype Area

    (see section 3.1.3) • as the user interface with the EVB. This requires a development tool such as Motorola’s Serial Debug Interface. For more information, refer to the Motorola Serial Debug Interface User’s Manual. Table 4-3. BDM Connector Pin Assignments...
  • Page 88: Figure 4-1. Mcu I/O Headers P2, P3

    HARDWARE REFERENCE VDD47 VSS48 PAD0 PAD1 PAD2 PAD3 PAD4 PAD5 PAD6 PAD7 VDDAD VSSAD PDLC6 PDLC5 PDLC4 PDLC3 PDLC2 PDLC1 PDLC0 VSSX77 VDDX78 Figure 4-1. MCU I/O Headers P2, P3 68EVB912B32UM/D...
  • Page 89: Figure 4-2. Mcu I/O Headers P4, P6

    HARDWARE REFERENCE PE6/MODB PE5/MODA VSSX30 VDDX31 RESET* EXTAL XTAL VDD10 VSS11 BKGD Figure 4-2. MCU I/O Headers P4, P6 68EVB912B32UM/D...
  • Page 90 HARDWARE REFERENCE 4-10 68EVB912B32UM/D...
  • Page 91: Appendix A S-Record Format

    S-RECORD FORMAT APPENDIX A S-RECORD FORMAT DESCRIPTION The S-Record format for output modules was devised for the purpose of encoding programs or data files in a printable format for transportation between computer systems. The transportation process can thus be visually monitored and the S-Records can be more easily edited. S-RECORD CONTENT When viewed by the user, S-Records are essentially character strings made of several fields that identify the record type, record length, memory address, code/data, and checksum.
  • Page 92: S-Record Types

    S-RECORD TYPES Eight types of S-Records have been defined to accommodate the several needs of the encoding, transportation, and decoding functions. The various Motorola upload, download, and other record transportation control programs, as well as cross assemblers, linkers, and other file- creating or debugging programs, utilize only those S-Records that serve the purpose of the program.
  • Page 93: S-Record Example

    S-RECORD FORMAT S-RECORD EXAMPLE Shown below is a typical S-Record format module, as printed or displayed: S00600004844521B S1130000285F245F2212226A000424290008237C2A S11300100002000800082629001853812341001813 S113002041E900084E42234300182342000824A952 S107003000144ED492 S9030000FC The above module consists of an S0 header record, four S1 code/data records, and an S9 termination record. The S0 header record is comprised of the following character pairs: S-Record type S0, indicating a header record.
  • Page 94 S-RECORD FORMAT The next 16 character pairs are the ASCII bytes of the actual program code/data. In this assembly language example, the hexadecimal opcodes of the program are written in sequence in the code/data fields of the S1 records: Opcode Instruction 28 5F BHCC...
  • Page 95: Introduction

    COMMUNICATIONS PROGRAM EXAMPLES APPENDIX B COMMUNICATIONS PROGRAM EXAMPLES INTRODUCTION In all of these examples, first follow the EVB startup procedure in section 3.2. When the startup procedure calls for setting up the host computer’s communications program for terminal emulation, follow the steps in the examples. Keyboard entries are illustrated in this appendix using the following conventions: <ENTER>...
  • Page 96: S-Record Transfers To Evb Memory

    COMMUNICATIONS PROGRAM EXAMPLES Flow control NONE CR translation (in) CR translation (out) BS translation DEST BS key definition Line wrap Scroll Break Length (ms) Enquiry (CTRL-E) 4. From the ASCII TRANSFER SETUP submenu, select the following: Echo locally Expand blank lines Pace character 0 (ASCII) Character pacing...
  • Page 97: Kermit For Dos - Ibm Pc

    COMMUNICATIONS PROGRAM EXAMPLES 2. Instruct Procomm to send the S-Record file by pressing the <Page Up> key. Follow the onscreen instructions to select the S-Record file for transfer, using ASCII transfer protocol. Upon completion of the S-Record file transfer, the D-Bug12prompt is displayed. KERMIT FOR DOS —...
  • Page 98: Kermit - Sun Workstation

    COMMUNICATIONS PROGRAM EXAMPLES KERMIT — SUN WORKSTATION Setup To set up Kermit on the Sun Workstation for use as the EVB terminal, first refer to section 3.2 for the EVB startup procedure, which is inter-related with this example. Then follow these steps: 1.
  • Page 99: Macterminal - Apple Macintosh

    COMMUNICATIONS PROGRAM EXAMPLES MACTERMINAL — APPLE MACINTOSH Setup To set up MacTerminal on an Apple MacIntosh computer for use as the EVB terminal, first refer to section 3.2 for the EVB startup procedure, which is inter-related with this example. Then follow these steps: 1.
  • Page 100: Red Ryder - Apple Macintosh

    COMMUNICATIONS PROGRAM EXAMPLES 4. Click on Send. NOTES 1. S-Records are not displayed during the file transfer. 2. Following the file transfer, MacTerminal sends a carriage return-line feed pair, which D-Bug12 interprets as an erroneous command. To return to the D-Bug12 prompt, reset the EVB.
  • Page 101 COMMUNICATIONS PROGRAM EXAMPLES NOTE S-Records are not displayed during the file transfer. Upon completion of the S-Record file transfer, the D-Bug12 prompt is displayed. 68EVB912B32UM/D...
  • Page 102 COMMUNICATIONS PROGRAM EXAMPLES 68EVB912B32UM/D...
  • Page 103 D-BUG12 STARTUP CODE APPENDIX C D-BUG12 STARTUP CODE The D-Bug12 startup code is located in Flash EEPROM starting at address range $F700, as shown in Table 3-5. To customize this startup code, it is necessary to alter the startup code in Flash EEPROM. For more information, refer to Appendix E ...
  • Page 104 D-BUG12 STARTUP CODE ;***************************************************************************** ; INITIALIZATION ; The code in this section is initialization for the monitor on the EVB12B32 ;***************************************************************************** __MonStartup: #STACKTOP ; initialize monitor stack pointer Disable the COP watchdog by CR2:CR1:CR0 = 0:0:0 COPCTL = $07 when reset in normal modes FCME and CRx bits are write once in normal modes COPCTL [ CME...
  • Page 105 D-BUG12 STARTUP CODE staa INITRG ; re-map the on-chip registers. #_UserFnTable ; point to the table of user accessible ;routines. [0,x] ; the first entry is a pointer to main. ; GO..This small subroutine is used to produce a delay of approximately 10 mS. This delay is based on the following conditions: 1.) An 8.00 MHz E-clock 2.) Subroutine located in internal memory...
  • Page 106 D-BUG12 STARTUP CODE 68EVB912B32UM/D...
  • Page 107: Appendix D D-Bug12 Customization Data

    D-BUG12 CUSTOMIZATION DATA APPENDIX D D-BUG12 CUSTOMIZATION DATA The customization data area, located in Flash EEPROM from $FC60 to $F6FF, allows users to change default data parameters used by D-Bug12. The data contained in this area is described by C data structure. The CustomData typedef is shown below. For those unfamiliar with C, an assembly language equivalent is also shown.
  • Page 108: Initial User Cpu Register Values

    CPU12 stack pointer points to the last byte pushed onto the stack. When operating the M68EVB912B32 in POD mode, the values in the table for the CCR and the Stack Pointer are not used. Instead, when the target processor is reset by using the RESET command, the target’s CCR is set to 0xd0.
  • Page 109: Scibaudregval Field

    D-BUG12 CUSTOMIZATION DATA NOTE It is the responsibility of the startup code to set the base address of the I/O registers. D-Bug12 does not set or change the I/O register base address. SCIBaudRegVal FIELD The SCIBaudRegVal field is used to set the initial baud rate of the SCI used for console I/O by D-Bug12.
  • Page 110: Eeprom Erase/Program Delay Function Pointer Field

    D-BUG12 CUSTOMIZATION DATA NOTE It is the responsibility of the startup code to set the base address of the EEPROM. D-Bug12 does not set or change the EEPROM base address. EEPROM ERASE/PROGRAM DELAY FUNCTION POINTER FIELD The (void)(* Delay)(void) field is a function pointer that points to an EEPROM program/erase delay routine.
  • Page 111 D-BUG12 CUSTOMIZATION DATA The function implementing the new command can report any error conditions to the user in one of two ways: If the error condition can be described by one of the error messages in the enumerated constant list below, the user-defined command should return the appropriate constant.
  • Page 112 D-BUG12 CUSTOMIZATION DATA 68EVB912B32UM/D...
  • Page 113: Serial S-Record Bootloader

    EEPROM BOOTLOADER APPENDIX E EEPROM BOOTLOADER The EEPROM bootloader occupies 1 Kbyte of erase-protected Flash EEPROM starting at address $FC00. It is invoked when the EVB is started in BOOTLOAD mode (W3-1 and W4-1). The bootloader may be used to program user code into byte-erasable (byte-erasable) EEPROM starting at address $0D00 and/or Flash EEPROM starting at address $8000.
  • Page 114: (E)Rase

    EEPROM BOOTLOADER bootloader executes immediately. The bootloader’s prompt appears on the host terminal: (E)rase, (P)rogram or (L)oadEE: Select the desired function by typing an upper- or lower-case "E", "P", or "L". NOTES Before selecting the Erase or Program function, apply Vpp to the EVB via header W8.
  • Page 115: (P)Rogram

    EEPROM BOOTLOADER (P)rogram In Flash programming mode, the bootloader sends an ASCII "*" (asterisk character) to the host computer, indicating that it is ready to receive an S-Record. The host then sends a single S-Record and waits for the "*" prompt from the bootloader before sending the next S-Record. This process is repeated until the bootloader receives an end-of-file (S9) record from the host computer.
  • Page 116: Reloading And Customizing D-Bug12

    EEPROM BOOTLOADER To allow the user code to specify interrupt and reset addresses, each member of the erase- protected vector table starting at address $FFC0 contains a pointer to a vector jump table, which is located in user-programmable Flash EEPROM starting at address $F7C0. Each entry in the vector jump table occupies two bytes of memory, which is adequate for the addresses of user reset and interrupt service routines.
  • Page 117: Obtaining D-Bug12 Upgrades

    EEPROM BOOTLOADER Obtaining D-Bug12 Upgrades Upgrades to D-Bug12 are made available for electronic downloading. S-Record files containing the latest version may be obtained from Motorola Advanced Microcontroller Division at the following locations: BBS  (512) 891-3733 (FREE) Telnet/FTP  freeware.aus.sps.mot.com World Wide Web ...
  • Page 118 EEPROM BOOTLOADER First, generate S-Record files for the new data, using an M68HC12-compatible assembler or C compiler. Next, prepare the D-Bug12 S-Record file for loading and add the customized S-Records to it. Using a text editor, perform the following steps: 1.
  • Page 119: Index

    INDEX INDEX NOBR — Remove Breakpoints, 3-41 RD — Register Display, 3-42 —A— REGBASE — Specify Target EEPROM Register Address, 3-43 ASM command, 3-11 REGISTER NAME — Modify Register Value, 3-52 assembler RESET — Reset Target MCU, 3-45 program, 1-5, 2-4, 3-54 RM —...
  • Page 120 3-54, 4-5 low voltage inhibit (LVI), 4-6 evaluation board. See EVB —M— component placement, 1-3 configuring, 2-1 M68EVB912B32 Evaluation Board. See EVB description, general, 1-1 MC68HC912B32 Microcontroller Unit. See MCU description, hardware, 4-1 features, 1-1 access interface, 1-5, 4-7 firmware.
  • Page 121 INDEX parameters, 3-2 —P— programming, 3-3 P1 — SCI RS-232C port, 2-2, 2-3 terminal baud rate, 2-5, 3-14 P2, P3, P4, P6 — MCU access, 1-5, 4-7 P5 — power input, 2-2, 4-4 cabling, 2-3 packing list, 2-1 communications parameters, 2-4 POD mode, 3-2, 3-5 communications software, 1-6, 2-4, B-1 power...
  • Page 122 INDEX 68EVB912B32UM/D...

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