HP 9030 CE Handbook page 87

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Backplane Signal Definitions
Signal
Definition
-12
-12 volt supply.
12 12 volt supply.
5 5 volt supply.
5BB
5 volt supply, battery backup.
5P Primary 5 volt supply.
5S Secondary 5 volt supply.
AC-
25 KHz ac sine wave from power supply.
AC+ 25 KHz ac sine wave from power supply.
CCLK Common clock.
GND
Ground plane of I/O backplane.
IDO
I/O door open.
IDOP
I/O door open (not used).
NARQ
HP-CIO card requests attention (negative true).
NBR
I/O bus burst mode DMA request (negative true).
NDEND
I/O bus device end (negative true).
NDPA
Internal select code available (negative true).
NFLG
I/O bus ready for data (negative true).
NICI
I/O bus interface control bit 1 (negative true).
NIC2
I/O bus interface control bit 2 (negative true).
NIC3
I/O bus interface control bit 3 (negative true).
NIC4
I/O bus interface control bit 4 (negative true).
NIDO
I/O door open (negative true).
NIFC
lIO bus interface clear (negative true).
NIODO
I/O bus input/output data bit 0 (negative true).
NIODI I/O bus input/output data bit 1 (negative true).
NIOD2
I/O bus input/output data bit 2 (negative true).
NIOD3
I/O bus input/output data bit 3 (negative true).
NIOD4
lIO bus input/output data bit 4 (negative true).
NIOD5
I/O bus input/output data bit 5 (negative true).
NIOD6
I/O bus input/output data bit 6 (negative true).
NIOD7
I/O bus input/output data bit 7 (negative true).
NIOD8
I/O bus input/output data bit 8 (negative true).
NIOD9 1I0 bus input/output data bit 9 (negative true).
NIODlO
1;0 bus input/output data bit 10 (negative true).
NIODll
lIO bus input/output data bit 11 (negative true).
NIOD12
1I0 bus input/output data bit 12 (negative true).
NIOD13 lIO bus input/output data bit 13 (negative true).
NIOD14
lIO bus input/output data bit 14 (negative true).
NIOD15
LO bus inputJoutput data bit 15 (negative true).
NIOSB
1/0
bus data transfer strobe (negative true).
NMYPA
HP-CIO card recognized its address has been asserted (negative true).
NNMI
Non-maskable interrupt (negative true).
NPAO
I/O bus peripheral address bit 0 (negative true).
NPAI lObus peripheral address bit 1 (negative true).
NPA2
I/O bus peripheral address bit 2 (negative true).
NPA3 lIO bus peripheral address bit 3 (negative true).
NPFW Power fail warning (negative true).
NPOLL lIO bus interface poll (negative true).