Pioneer CDJ-400 Service Manual page 51

5
(Anal)
VREF2R5
15 V+3R3
1 0 0 u / 6 . 3
48
C 1 6 9
-c
C 1 6 8
0.1u
C 1 7 0
C 2 1 3 0.1u
0.1
6M
IC118
VCC
INA
OUTY
GND
C 1 7 1
TC7SH04FUS1
0.1u
16
17
X W R
From CPU
X O E
From CPU
19
18
DATA
ADRESS
CPU-FPGA
CPU-DSP-DAC
CPU-SRV
A 2/2
SRVCCE
CHECK
FPGASCLK
DSPRST
DATA0 ADRS16
1
DATA1 ADRS19
2
DATA2
3
DATA3 USBRST
4
DATA4 SRVRST
5
DATA5
6
DATA6 SRVBCLK
7
From SRV
DATA7
8 T A C T
ADRS20
to FPGA
DATA8 SPDLFG
1 &DSP&DAC
DATA9
2 Q S P I S O
DATA10 DATA3
3
DATA11 DATA1
4
DATA12 ZERO
5
DATA13
6
DATA14
7
DATA15 ADC
8
X O E
DONE
to FPGA
&FLASH&USB
FPGALRCK
XDSPCS
DATA5
DATA4
DATA2
DATA0
T A C T
From SRV
S R V S B S Y
From SRV
A 2/2
XINIT
XFRST
V+3R3
DONE
R 2 0 1
1 0 k
V+2R5
R 2 0 2
4 . 7 k
V+3R3
V+3R3
IC112
5 1
C T V O U T
2
V D D
4 3
N C G N D
BU4230G
GNDD
5
6
14
R 2 0 9
1 0 k
13
4 9 3 2
5 0 3 1
D 2 / C S
5 1 32: D M 2 3 0 0.1u
49: D 0
D 3 2 . 5 V D D 2
31: D P 2
5 2 2 9 C 1 8 4
50: D 1
2 . 5 V D D 3 V S S 2
5 3 2 8
V S S 3 A 1 2
IC113
5 4 2 7
W V D D 3 A 1 1
5 5 TDOTG242-0F0C8 2 6
D 4 A 1 0
5 6 2 5
D 5 A 9
5 7 USB CONTROLLER 2 4
D 6 A 8
5 8 2 3
D 7 A 7
C 1 8 3
5 9 2 2
C L K W W V D D 2
0.1u
6 0 18: A 4 2 1
V S S A 2 A 6
17: A 3
6 1 2 0
2 . 5 V D D A A 5
6 2 1 9
O S C 1
6 3 1 8
O S C 2
6 4 1 7
GNDD
-b
36
CPU-BUS
L9 L8
L11
TA
L12
L13
L14
M1
A16
L11: TA/GPIO20
M2
A19
L12: SDATAO1/GPIO25
M3
TEST2
L13: SCLK1
M4
SDATA1_BS1/GPIO9
L14: SCLK4/GPIO50
M11
SDA2/GIPO55
M12
TEST3
M13
LRCK4/GPIO46
M14
SDATAI4/GPI42
N1
A20
N2
XCSSDRAM SDRAM_CS1
N3
XWESDRAM
SDWE
N4
GPIO5
N5
QSPI_DOUT/GPIO26
N6
DATA19
N7 DATA17
N8 SDRAM_CS2/GPPIO7
N9
EBUOUT1/GPO36
N9
N10
RX/XBY
EBUIN2/GPI37
N11
TOUT1/ADOUT/GPO35
N12 OE
N13
SCLK2/GPIO4 8
N14
LRCK1
P1 SDRAS
XRAS
P2 SDCAS
XCAS
P3
LDQM
SDLDQM
P4
QSPI_CS0/GPIO29
P5 DATA21
P6
DATA20
P7 DATA18
P8 DATA16
P9 EBUOUT2/GPO37
P9
P10 EBUIN3/ADIN0/GPI38
P11
SCL2/GPIO3
P12
XRST
RSTI
P13
LRCK2/GPIO44
P14
SDATAO2/GPO41
GNDD
A7 A9 A10 A14
CPU-FPGA
1
RST
RESET
IC
(Data)
: DIGITAL DATA SIGNAL ROUTE(Digital)
(Anal)
: AUDIO Lch OUT SIGNAL ROUTE(Analog)
: DIGITAL AUDIO SIGNAL ROUTE
6
7
USBB_N
USBB_P
V+5DETD
A_AROUT
A_ALOUT
MUTE
SPDIF
USBPE
12
11
10
Q 1 0 4
2 S C 4 0 8 1 ( R S )
22k
R 1 7 0
R T 1 N 2 4 1 M
GNDD
GNDD
USBIRQ
5MON
J4
SDATA0_SDIO1/GPIO54
G14: MCLK1/GPIO39
G13: MCLK2/GPO42
G12: SUBR/GPIO53
G11: IDE-IORDY/GPIO16
XTRIM/GPO38
SFSY/GPIO52
RCK/GPIO51
TRST/DSCLK
EF//GPIO19
SCLK_OUT/GPIO15
CPU
IC114
CORE-G ND2
CORE-VDD3
SRE/GPIO11
SCF5249VM140
SWE/GPIO12
CORE-G ND1
SDA/QSPI_DIN
CMD_SDIO2/GPIO34
BCLK/GPIO10
PST3/GPIO62
CNPSTCLK/GPIO63
D8: RTS1_B/GPO30
D7: TXD1/GPO27
D6: TIN1/GPIO23
CTS1_B/GPI30
D5: PAD-GND1
V+3R3
GNDD
CPU-CN
CDJ-400
7
8
MAIN ASSY
A 1/2
(DWG1652)
9
UBN
1 7
UBP
1 6
GNDD
1 5
Rch
1 4
(Anal)
1 3
Lch
1 2
1 1
MUTE
1 0
9
CNT1
8
GNDD
8
7
CNT2
6
TXD
5
SPDIF
4
VF D P 5 R 6
R X D
3
V+ 5
2
V5DT
1
GNDD
2 3
UAP
USBA_P
2 2
UAN
USBA_N
2 1
2 0
UPFG
USBPFLG
1 9
TSCK
CONT1
1 8
UPE
USBPE
1 7
TSI
CONT2
1 6
GNDD
22k
1 5
TSO
R 1 7 1
1 4
1 3
V+3R3
TSCS
1 2
7
VFDP5R6
1 1
Q 1 0 5
V-5
V+3R3 1 0
GNDD
9
V-5
V5R6
8
R 1 9 3
Q 1 0 6
7
2 S C 4 0 8 1 ( R S ) 3.3k
V3R3
V+3R3
6
R 1 7 5 R 1 9 0
GNDD
5
22k 3.3k
GNDM
R 1 8 1
4
V7M
3
3.3k
V+7M
GNDD GNDM
2
1
3
CPU-FPGA
CPU-DSP-DAC
CPU-CN
CPU-USB
6
4
5
V+ 3 R 3
G14
G13
G12
G11
SRVB U S 3
G4
G 4
G3
A22
G2
DATA26
G1
DATA25
F14 P L A Y
F13
CONTI1
F12
R 1 8 2
F11
TCKDS
N M
F4
DRVMUTE2
0
R 2 0 5
F3
SRVB U S 2
F2
DATA24
F1
UDQM
SDUDQM
X W E
E14
RW_ B
R 1 8 3
TMSBKPT
E13
to FPGA & FLASH
TMS/BKPT
1 0 k
R 1 8 7
E12
T C K
E11 0
PAD-GND2
E10
GNDD
E9 C 1 9 5
E8
0.1 USBCS
E7 X W R
E6 to USB
C 1 9 6
E5
PAD-VDD2
E4 0.1
D S P S IN
E3
70MHz
C L K _ 7 0 M
E2 R 1 8 0
E1 3 3
BCLKE
BCLKE to FPGA&SDRAM
D14
PST3
D13
PSTCLK
D12 C 1 9 7
PAD-VDD1
D11 0.1 TDIDSI
1 0 k
TDI/DSI
R 1 8 4
D10
T D O D S O
TDSO
R 1 8 5 1 0 k
D9
LPS1
D8
D8
R 2 0 4 2 2 k
D7 TXD
D6
TCOUNT
D5
V+1R 8
V1R8
!
IC116
V3R3
1
V O
7
V I N
2
N C 6
GNDD
3 S U B
G N D 5
C 2 0 1
4 C O N T
C N
4 7 0 p
MM1561JF
GNDD
GNDD
1.8V
REGULATOR
USBCS,USBIRQ
CPU-USB
&EP036 CDJ-400
MAIN SCHEMA (1/2)
8
A
USBB_N
USBB_P
GNDD
A_AROUT
GNDD
A_ALOUT
GNDD
MUTE
GNDD
CONT1
GNDD
CONT2
TXD
SPDIF
RXD
VFDP5R6
V+5DETD
GNDD
B
USBA_P
USBA_N
GNDD
USBPFLG
T S C K
U S B P E
TSI
GNDD
TSO
GNDD
T S C S
GNDD
V-5
GNDD
VFDP5R6
GNDD
V+ 3 R 3
V+ 3 R 3
GNDM
V+7M
GNDM
V+7M
C
ADRS22
DATA10
D A T A 9
D
DATA 8
E
F
A 1/2
51