Synthesizer; Vco; Display Board; The Gp60 Series Radio Alignment Procedures - Motorola GP68 Service Manual

GP68 Portable Radios Service Manual

The GP60 Series Radio Alignment Procedures

In addition to the VCO, the synthesizer must interface with
the logic and AFIC circuitry. Programming for the synthe-
sizer is accomplished through the data, clock, and chip
enable lines (pins 5, 6, and 7) which are driven by the micro-
processor, U401. A serial stream of 98 bits is sent whenever
the synthesizer is programmed. A 5 Volt dc signal from pin 2
of U201 indicates to the microprocessor that the synthesizer
is locked while unlock is indicated by a low voltage on this
pin. Transmit modulation from the AFIC is applied to pin 8
of U201. Internally the audio is digitized by the Fractional-
N and applied to the loop divider to provide the low-port
modulation. The audio is also run through an internal atten-
uator for modulation balancing purposes before being out-
putted at pin 28 to the VCO. A 2.1 MHz clock for the AFIC
is generated by the Fractional-N and is routed to pin 11
where it is filtered and attenuated from 2.5 Volts to approxi-
mately 2 Volts.

Synthesizer

The Fractional-N synthesizer uses a 16.8 MHz crystal
(Y201) to provide the reference frequency for the system.
The other reference oscillator components external to the IC
are C205, C206, R211, R207, and CR203. The loop filter,
comprised of R202, R204, R205, C214, C215, and C216,
provides the necessary dc steering voltage for the VCO as
well as filtering of spurious signals from the phase detector.
For achieving fast locking of the synthesizer, an internal
adapt charge pump provides higher current capability at pin
31 than when in the normal steady-state mode. Both the nor-
mal and adapt charge pumps receive their supply from the
voltage multiplier which is made up of C202, C203, C204,
C231, CR201, and CR202. By combining two 5 Volt square
waves which are 180 out-of-phase along with Regulated 5
Volts, a supply of approximately 12.6 Volts is available at pin
32 for the charge pumps. The current for the normal mode
charge pumps is set by R203. The pre-scaler for the loop is
internal to U201 with the value determined by the frequency
band of operation.

VCO

The VCO (U251) in conjunction with the Fractional-N syn-
thesizer (U201) generates rf in both the receive and the trans-
mit modes of operation. The TRB line (U251 pin 5)
determines which oscillator and buffer will be enabled. A
sample of the rf signal from the enabled oscillator is routed
from U251 pin 23, through a low pass filter, to the pre-scaler
input (U201 pin 20). After frequency comparison in the syn-
thesizer, a resultant STEERING LINE VOLTAGE is
received at the VCO. This voltage is a DC voltage between 3
and 11 Volts when the PLL is locked on frequency.
In the receive mode, U251 pin 5 is grounded. This activates
the receive VCO by enabling the receive oscillator and the
receive buffer of U251. On VHF radios, the rf signal at U251
pin 2 is run through a low pass filter. On UHF radios, the rf
signal is run through a buffer amplifier before it is passed
March, 1997
through the low pass filter. This is to provide additional iso-
lation to the receive VCO from high level received rf signals.
The rf signal after the low pass filter is the LO RF INJEC-
TION and it is applied to the first mixer at U41 pin 3.
During the transmit condition, PTT depressed, five volts is
applied to U251 pin 5. This activates the transmit VCO by
enabling the transmit oscillator and the transmit buffer of
U251. The rf signal at U251 pin 4 is run through a low pass
filter and an attenuator to give the correct drive level to the
input of the PA. This rf signal is the Tx RF INJECTION.
Also in transmit mode, the audio signal to be frequency mod-
ulated onto the carrier is received by the transmit VCO mod-
ulation circuitry at AUDIO IN.
When a high impedance is applied to U251 pin 5, the VCO
is operating in BATTERY SAVER mode. In this case, both
the receive and transmit oscillators as well as the receive,
transmit, and pre-scaler buffer are turned off. In the Frac-
tional-N, the battery saver mode places the A/D and the mod-
ulation attenuator in the off state. This mode is used to reduce
current drain of the radio.

Display Board

The display driver (U801) is powered up by the +5V line
from the controller. Pin 21 and 49 of the U801 should have
the voltage of +5V. The clock frequency of the LCD driver is
determined by R814, R815, and C801. This frequency is
approximately 1.61 kHz.
The +5V line to the U801 also provides bias voltages to pins
23, 24, and 26 of U801 through R811, R812, and R813.
The LEDs are biased, using R802 and R803, through the
+ 5 V l i n e . T h e s w i t c h Q 8 0 1 i s c o n t r o l l e d b y t h e
LCD_BCK_LIGHT_EN line. When this line goes high (i.e.
5V), Q801 is turned on and the LEDs lights up.
The GP60 Series Radio Alignment
Procedures
The following procedures are to be done together with the
RSS.

RSSI Threshold Adjustment

Tuning Frequency:
Automatic - Frequency displayed on Tuning screen.
• Apply a standard reference level signal of -47 dBm,
1 kHz tone with 3 kHz deviation.
• Adjust the audio output of the radio to rated level
(0.25W), i.e. 2.45 V rms.
• Reduce the generator level until 10 dB SINAD is
obtained.
• While the radio is in the 10 dB SINAD mode, press
the up-arrow key once to program the correct RSSI
setting into the radio.
6881086C09-O
Theory of Operation
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