Processing time for S(P).SFCSCOMR instruction and
S(P).SFCTCOMR instruction
Processing time for S(P).SFCSCOMR instruction and S(P).SFCTCOMR instruction is shown below.
[Condition]
• The number of comments to be stored in the comment file: 1000
• Sequence steps in the SFC step in the SFC program: 1000 sequence steps
• The number of active steps: 40
Instruction
Condition
S(P).SFCSCOMR
At instruction execution
At END processing (read 1 comment)
S(P).SFCTCOMR
At instruction execution
At END
processing
(read 1
comment)
*1 Indicates that the sequence steps in SFC steps consist of 800 sequence steps.
Instruction
Condition
S(P).SFCSCOMR
At instruction execution
S(P).SFCTCOMR
Instruction
Condition
S(P).SFCSCOMR
At END processing (read 1 comment)
S(P).SFCTCOMR
At END
processing
(read 1
comment)
3 SPECIFICATIONS
34
3.3 Processing Time
• Transition condition for serial
transition
• Transition condition after
selection branching
Transition
Number of
condition after
parallel
parallel
couplings: 2
coupling
Number of
parallel
couplings: 32
Transition condition for serial
transition
Transition condition after
selection branching
Transition
Number of
condition after
parallel
parallel
couplings: 2
coupling
Number of
parallel
couplings: 32
High Performance model QCPU
QnCPU
QnHCPU
280s
120s
780s
350s
300s
130s
2.5ms
1.1ms
4.5ms
2.0ms
*1
60.5ms
26.2ms
Universal model QCPU
Q03UD(E)CPU
Min.
Max.
190s
193s
190s
193s
Universal model QCPU
Q03UD(E)CPU
SRAM card
Flash card
3.3ms
4.5ms
3.7ms
5.3ms
3.2ms
4.9ms
4.0ms
5.7ms
18.7ms
21.0ms
Process CPU
Redundant
CPU
120s
120s
350s
350s
130s
130s
1.1ms
1.1ms
2.0ms
2.0ms
26.2ms
26.2ms
Q04UD(E)HCPU, Q06UD(E)HCPU,
Q10UD(E)HCPU, Q13UD(E)HCPU,
Q20UD(E)HCPU, Q26UD(E)HCPU,
Q50UDEHCPU, Q100UDEHCPU
Min.
Max.
176s
177s
176s
177s
Q04UD(E)HCPU, Q06UD(E)HCPU,
Q10UD(E)HCPU, Q13UD(E)HCPU,
Q20UD(E)HCPU, Q26UD(E)HCPU,
Q50UDEHCPU, Q100UDEHCPU
SRAM card
Flash card
2.5ms
4.0ms
3.3ms
5.0ms
2.9ms
4.4ms
3.6ms
5.1ms
13.8ms
14.0ms