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Epson RX8130 CE Applications Manual

Epson RX8130 CE Applications Manual

Real time clock module
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ETM50E-05
l
Application Manua
Real Time Clock Module
RX8130 CE
Preliminary

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  • Page 1 ETM50E-05 Application Manua Real Time Clock Module RX8130 CE Preliminary...
  • Page 2 The information about applied circuitry, software, usage, etc. written in this material is intended for reference only. Seiko Epson does not assume any liability for the occurrence of infringing on any patent or copyright of a third party. This material does not authorize the licensing for any patent or intellectual copyrights.
  • Page 3 ETM50E Revision History Rev No. Date Page Description ETM50E-01 ETM50E-02 05.Oct.2015 Release Corrected a the block diagram. ETM50E-03 10.May.2016 Add description to [3.2. Pin Functions]. Corrected a [10.1. Characteristic for the fluctuation of the power supply ] Corrected a [7) Clock output function] Corrected a [14.7.2.

  • Page 4: Table Of Contents

    RX8130 CE Contents 1. Overview ........................1 2. Block Diagram ....................... 1 3. Terminal description  ..................... 2 4. Examples of external connection ................... 2 5. External Dimensions / Marking Layout ................3  Absolute Maximum Ratings ................... 4 7. Recommended Operating Conditions ................4 8.

  • Page 5: Overview

    RX8130CE  Build-in backup battery charge control function  SERIAL-INTERFACE REAL TIME CLOCK MODULE RX8130CE •Built in frequency adjusted 32.768 kHz crystal unit. •Interface type C-Bus interface (up to 400 kHz) •Wide operating voltage range : 1.6Vto5.5V •Wide timekeeper voltage range : 1.1Vto5.5V...

  • Page 6: Terminal Description

    RX8130CE   3. Terminal description 3.1. Terminal connections RX8130CE 1. V 10. V 2. SCL 9. V 3. SDA 8. V 4. FOUT 7. GND 5. /RST 6. /IRQ 3.2. Pin Functions Signal Function name Serial clock input pin. Input Data input and output pin.

  • Page 7: External Dimensions / Marking Layout

    RX8130CE  External Dimensions / Marking Layout 5.1. External Dimensions "CE"PKGRev.04  RX8130CE • External dimensions • Recommended soldering pattern 3.2  0.2 (Typ.3.24) small mounting area Type.1 (for Type.2 0.7 0.4 0.42 0.35 Unit : mm 5.2. Marking Layout RX8130CE Type Logo...

  • Page 8: Absolute Maximum Ratings

    RX8130CE  6.Absolute Maximum Ratings GND=0V Item Symbol Condition Rating Unit 0.3  +6.5  Supply voltage 0.3  +6.5  Internal voltage 0.3  +6.5  Backup supply voltage Interface 0.3  +6.5  supply voltage 0.3  +6.5 Input voltage 1 SCL, SDA 0.3 ...

  • Page 9: Electrical Characteristics

    RX8130CE  9. Electrical Characteristics 9.1.DC characteristics *Unless otherwise specified, GND=0V,Ta=40Cto+85C =1.1V5.5V, V 9.1.1. DC characteristics(1) Unless otherwise specified, GND =0V,V =1.6V5.5V,    C +85 Ta=40 Item Symbol Condition Min. Typ. Max. Unit SCL=SDA = ”H” , Current consumption in FOUT=OFF, /IRQ=OFF, normal operation mode 1500...
  • Page 10 RX8130CE  Item Symbol Condition Min. Typ. Max. Unit output voltage 1 =3.0V、I =1mA -0.06 VOUT1 output voltage 2 =3.0V、I =0.1mA -0.02 VOUT2 High-level 0.8  V , SDA input voltage Low-level GND  0.3 0.2  V SCL, SDA input voltage High-level –0.5...
  • Page 11 RX8130CE  9.2. AC characteristics 9.2.1. AC characteristics(1)   C +85 Unless otherwise specified, GND =0V,V =1.6V5.5V,Ta=40 Standard-Mode Fast-Mode =100kHz) =400kHz) Item Symbol Unit Min. Max. Min. Max. SCL clock frequency s Start condition setup time SU;STA s Start condition hold time HD;STA Data setup time SU;DAT...
  • Page 12 RX8130CE  9.2.3. AC characteristics(3) Item symbol unit Reset internal delay time DELAY Reset delay time DELAYF (Initial power ON) (t_str+t DELAY Timing chart DET11 DET12 DELAYF DELAY /RST * t_str is oscillation startup time. Item symbol unit Reset delay time Recovery from Backup DELAYB t_int+t_...

  • Page 13: Matters That Demand Special Attention On Use

    RX8130CE  10. Matters that demand special attention on use 10.1. Characteristic for the fluctuation of the power supply *This circuit is sensitive to power supply noise and supply voltage should be stabilized to avoid negative impact on the accuracy. * tR1 is needed for a proper power-on reset.
  • Page 14 RX8130CE  10.2. Restrictions on Access Operations During Power-on Initialization and Recovery from Backup • Because most of RTC registers are synchronized with the oscillation clock of the built-in crystal oscillator, the RTC does not work normally without the integrated oscillator having stabilized. Please initialize the RTCat the time thepower supply voltage returns (VLF = 1) after the oscillation has stabilized (after oscillation start time tSTA).

  • Page 15: Reference Information

    RX8130CE  11. Reference information 11.1. Reference Data [Finding the frequency stability] (1)Example of frequency and temperature characteristics  = +25 C Typ. 1.Frequency and temperature characteristics can be  10  = -0.035  10 Typ. approximated using the following equations. f =(...

  • Page 16: Application Notes

    RX8130CE  12. Application notes 1) Notes on handling This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity.

  • Page 17: Overview Of Functions And Description Of Registers

    RX8130CE  13.  Overview of Functions and Description of Registers Note: The initialization of the register is necessary about the unused function. 13.1. Overview of Functions 1) Clock functions This function is used to set and read out second, minute, hour, day, month, year ( to the last two digits), and date data.

  • Page 18: Register Table

    RX8130CE  13.2. Register table 13.2.1. Register table Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address[h]   HOUR   WEEK       MONTH YEAR MIN Alarm •...

  • Page 19: Description Of Registers

    RX8130CE  13.2.2. Register initial value , and Read/Write operation table "0" 【 ０： Write impossible、Read value 】 【 X： Undefined （Initialization by register writing is needed）】 【 0： Reset state 】 【 1： Set state 】 Function bit 7 bit 6 bit 5 bit 4...
  • Page 20 RX8130CE  13.3.5. Function-related register 1 (1C[h]1E[h]) 1) FSEL1, FSEL0 bit A combination of the FSEL1 and FSEL0 bits are used to select the frequency to be output. The choice is possible by a combining FSEL-bits and CE/FOE-pin, select the frequency of clock output ...

  • Page 21: How To Use

    RX8130CE  How to use 14.1. Clock calendar explanation At the time of a communication start, the Clock & Calendar data are fixed (hold the carry operation), and it is automatically revised at the time of the communication end. Therefore it recommends that the access to a clock calendar has continuous access by the auto increment function.

  • Page 22: Fixed-Cycle Timer Interrupt Function

    RX8130CE  14.2. Fixed-cycle Timer Interrupt Function The fixed-cycle timer interrupt function generates an interrupt event periodically at any fixed cycle set between 244.14s and 65535 hours. This function can stop at one time and is available as a accumulative timer. After the interrupt occurs, the /IRQ status is automatically cleared ....
  • Page 23 RX8130CE  Inside counter block diagram 4096Hz 64Hz Resister source Timer Counter 0 TSTP clock Timer Counter 1 selector 1/60Hz 1/3600Hz TSTP 1/60 1/60 timer stop signal TSTP,TBKE,TBKON bit  The resolution of the count value depends on the source clock 3) TE bit(Timer Enable)...
  • Page 24 RX8130CE  7) TSTP bit (Timer Stop) This bit is used to stop fixed-cycle timer count down. STOP TBKE TSTP Description Writing a "0" to this bit cancels stop status (restarts timer count down). The reopening value of the countdown is a stopping value Count stops.
  • Page 25 RX8130CE  14.2.4. Fixed-cycle timer interrupt interval (example) The combination of the source clock settings and fixed-cycle timer countdown setting sets interrupt interval, as shown in the following examples. Source clock Timer Counter setting 4096 Hz 64 Hz 1Hz 1/60 Hz 1/3600 Hz TSEL2=1...
  • Page 26 RX8130CE  Fixed-cycle timer starts Fixed-cycle timer stops "1" TE bit Operation of fixed-cycle timer "0" "1" TIE bit "0" Hi-z /IRQ output "L" tRTN tRTN tRTN tRTN "1" TF bit "0" period period period period Event occurs I nternal operation Write operation (1) A time update interrupt event occurs when the internal clock's value matches either the second update time or the minute update time.

  • Page 27: Alarm Interrupt Function

    RX8130CE  14.3. Alarm Interrupt Function The alarm interrupt function generates interrupt events for alarm settings such as date, day, hour, and minute settings. When an interrupt event occurs, the AF bit value is set to "1" and the /IRQ pin goes to low level to indicate that an event has occurred.
  • Page 28 RX8130CE  3) AF bit(Alarm Flag) When this flag bit value is already set to "0", occurrence of an alarm interrupt event changes it to "1". When this flag bit value is "1", its value is retained until a "0" is written to it. Data Description Clearing this bit to zero enables /IRQ low output to be canceled (/IRQ...
  • Page 29 RX8130CE  14.3.3. Diagram of alarm interrupt function MIN detection result MIN AE HOUR detection result HOUR AE WEEK detection result AF Flag WEEK / DAY AE DAY detection result WADA Internal minute carry AF ( “0” clear ) /IRQ "1"...

  • Page 30: Time Update Interrupt Function

    RX8130CE  14.4. Time Update Interrupt Function The time update interrupt function generates interrupt in one-second or one-minute intervals which are synchronized to the update of the second or minute time register of the RTC When an interrupt event is generated, This /IRQ status is automatically cleared (/IRQ status changes from low level to Hi-z earliest 7.57ms (maximum 15.63ms) after the interrupt occurs).
  • Page 31 RX8130CE  14.4.2. Time update interrupt function diagram UIE bit UF Flag /IRQ UF ( “0” Clear ) Carry Sec. /tRTN Carry Min. Update Control Circuit USEL bit F64Hz "1" UIE bit "0" Hi-z /IRQ output "L" tRTN "1" UF bit "0"...

  • Page 32: Frequency Stop Detection Function

    RX8130CE  14.5. Frequency stop detection function This flag bit indicates the retained status of clock operations or internal data. Its value changes from "0" to "1" when data loss might have occureddue to supply voltage drop. Once this flag bit's value is "1", its value is retained until a "0"...
  • Page 33 RX8130CE  elated register of 14.7.2. R Battery backup switchover function Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Address[h] Flag Register VBLF  VBFF Control Register1 INIEN  VSEL TSEL1 TSEL0 VSEL1 VSEL0...
  • Page 34 RX8130CE  4) SMPTSEL1, SMPTSEL0 bit voltage drop detection (V ) constantly monitors the main supply voltage applied to VDD-pin and in case DET2 VDD drops below -VDET2 voltage, the power supply is switched from VDD to VBAT. For the monitoring of the VDD voltage, it is necessary to switch the MOS-switch SW1 (SW1 is located between the V ) off for the measurement time (to avoid measuring the voltage on VOUT-pin or supplied from VBAT).
  • Page 35 RX8130CE  5) BFVSEL1, BFVSEL0 bit Setting the full charge detection threshold voltage to stop charging of the backup battery. BFVSEL1 BFVSEL0 Description 3.02 V (default) 3.08 V 2.92 V OFF (Don’t stop charge) The full-charge detection (V ) and over-discharge detection (V ) control SW2.
  • Page 36 RX8130CE  Main power supply (V ) voltage and operation state 3.3V DET11 DET12 DET2 /RST or -V DET12 DET11 Register setting  V  V Charge stop Charge enable: -V and V DET3 I/F,FOUT Stop of the function functioning I/F,FOUT A function of I/F and FOUT stops in sync with the /RST output...

  • Page 37: Reset Output Function

    RX8130CE  Backup power supply (V ) voltage and a charge state Adjustment by register setting is possible DET3  V  -V 1) In case of voltage rise DET2 Register settings allow to stop or prevent charging or keep charging VBAT as well above upper limit (+VDET3) SW2=OFF...

  • Page 38: Detection Voltage Setting

    RX8130CE  14.9. Detection voltage setting Overview of detection voltage levels Item Symbol Detect voltage(Typ) setting RSVSEL “0” (default) / -V 2.8V / 2.75V DET11 DET11 Reset /Reset-release voltage DET1 RSVSEL “1” / -V 2.7V / 2.65V DET12 DET12 Backup switchover/recover voltage / -V 1.35V / 1.30V DET2...
  • Page 39 RX8130CE  • How to calculate the offset value 1 ) When the offset value is positive: L [7  1] =[Offset Value]/ 3.05 However, decimals are discarded. When the offset value is +192  10 Example calculation: L[7  1] = 192.26 / 3.05 = 63 (dec) = 0111111(bin) is set.

  • Page 40: Flow-Chart

    RX8130CE  14.11. Flow-chart The following flow-chart is one example, but it is not necessarily applicable for every use-case and not necessarily the most effective process for individual applications. 1) Processing example at the time of power-on, after internal oscillation stabilized (VLF stays “0”) Start Power on •...
  • Page 41 RX8130CE  2) Example of Initialization routine Initialization •  Setting of the digital offset When the digital offset function is not being used, write 0 in the DTE bit. Reg30[h] •Set TE bit to “0”. •Set FSEL1,0 bitoptionally. Reg1C[h] •Clear VLF bit to “0”.
  • Page 42 RX8130CE  4) The reading of the clock and calendar • Please complete access within 0.95 seconds Reading of the clock The STOP bit holds "0". (It causes the clock delay to set STOP bit to “1”) • At the time of a communication start, the Clock & Calendar data are fixed Read clock (hold the carry operation), and it is automatically revised at the time of the communication end.
  • Page 43 RX8130CE  6) Setting example of the Alarm interrupt function Alarm setting •Set AIE bit to “0” to stop Alarm-interrupt function. Reg-1E[h] • Set alarm data. Reg17[h] 19[h] • Select week or day in WADA bit Reg-1C[h] • Clear AF bit Reg-1D[h] •...

  • Page 44: Reading/Writing Data Via The I C Bus Interface

    RX8130CE  14.12. Reading/Writing Data via the I C Bus Interface 14.12.1. Overview of I C-BUS The I C bus supports bi-directional communications via two signal lines: the SDA (data) line and SCL (clock) line. A combination of these two signals is used to transmit and receive communication start/stop signals, data transfer signals, acknowledge signals, and so on.
  • Page 45 RX8130CE  14.12.5. System configuration All ports connected to the I C bus must be either open drain or open collector ports in order to enable AND connections to multiple devices. SCL and SDA are both connected to the V line via a pull-up resistance.
  • Page 46 RX8130CE  14.12.6. I C bus protocol In the following sequence descriptions, it is assumed that the CPU is the master and the RX8130 is the slave. 1)Address specification write sequence Since the RX8130 includes an address auto increment function, once the initial address has been specified, the RX8130 increments (by one byte) the receive address each time data is transferred.
  • Page 47 Unit 715-723 7/F Trade Square, 681 Cheung Sha Wan Road, Kowloon, Hong Kong Phone: (86) 755-2699-3828 (Shenzhen Branch) Fax: (86) 755-2699-3838 (Shenzhen Branch) www.epson.com.hk Epson Taiwan Technology & Trading Ltd. 14F, No.7, Song Ren Road, Taipei 110 Phone: (886) 2-8786-6688 Fax: (886)2-8786-6660 www.epson.com.tw/ElectronicComponent Epson Singapore Pte.

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