Related Manuals for Epson RX4111CE
Summary of Contents for Epson RX4111CE
- Page 1 Application manual Real Time Clock Module RX4111CE Product name Product number RX4111CE A X1B000431000115 RX4111CE B X1B000431000215...
- Page 2 Epson’s official web sites and resources. This document may not be copied, reproduced, or used for any other purposes, in whole or in part, without Epson’s prior consent. Information provided in this document including, but not limited to application circuits, programs and usage, is for reference purpose only.
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Page 3: Etm62E Revision History
Even if using small EDLC, This note desn't need. Page42 Bypass capacitor value was corrected. 0.1μF from 1.0μF. " 15.Connection example" Contacts list was updated. "Contacts" The link to index was added to the all footer. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 4: Table Of Contents
13.3.5. Power Switching Circuit-Related Register Bank3 02h ..........24 13.3.6. Time stamp-related register .................... 24 13.3.7. RAM registers (Bank4, 5, 6, 7) ..................24 14. How to use ......................... 25 14.1. Clock Calendar Explanation ......................25 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... - Page 5 14.10.1 Write / Read and Bank Select..................56 14.10.2 Write of Data........................56 14.10.3 Read of Data ......................... 56 15. Connection example ....................57 16.Tables ......................... 58 17.Figures ........................59 Contacts .......................... 60 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
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Page 6: Overview
8 events. Using the backup battery switch control function and the interface power supply input pin, RX4111CE can support various power supply circuits. All of the functions mentioned above are offered in a thin and compact 3.2 x 2.5 ceramic package which could be used in various applications requiring small footprints. -
Page 7: Terminal Description
For the Open-Drain pin, it is permitted for the pull-up to be 5.5 V regardless of the V voltage. When FOUT or INT is not used, be left open in these pins. It doesn't need pull-Up/Down resistor. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 8: Connection Example
INIEN = 0 INIEN = 1 SWSEL1 = 1 SWSEL0 = 0 0.1 F 0.1 F I = V/R > 1 mA Non-Re-chargeable battery Figure 6 Circuit Ex.3 Figure 7 Circuit EX.4 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 9: External Dimensions / Marking Layout
B : None 123A Production lot #1 Pin Mark Contents displayed indicate the general markings and display, but are not the standards for the fonts, sizes and positioning. Figure 9 Marking layout RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 10: Absolute Maximum Ratings
2 Equivalent to 60 seconds per month deviation. *3 Aging stability is estimated from environmental reliability tests; expected amount of the frequency variation. This does not intend to guarantee the product-life cycle. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 11: Electrical Characteristics
=5.4 V A SW = ON SWON1 ΔV=＋0.1 V, V =3.0 V , V =2.9 V resistance = 125 Ω～750 Ω SWON1 =5 V CEpin kΩ Input Resistance =V =3 V RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 12: Chargeable Current Characteristics
= 3.0 V, +25 °C 0.85 V / 10 mA Typ. VR = 5.5 V, -40 °C +85 °C Diode IR 5 nA (Max.) Charge current into V should be less than 40 mA. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 13: Ac Characteristics
If communication is interrupted before receiving 8 bits data, data will not be written. *1: Even if CE is Low, DI pin is active. Don't input half voltage and don't left open DI. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 14: Ac Characteristics (2)
) during backup is intermittent operation (31.25 ms) , a delay occurs after V reaches DET1 until the power supply switches. DET1 *3 For internal initialization, the V voltage at the initial power-on must be increased to 1.6 V or more. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 15: Vdd And Ce Timing At Power On
After 30 ms progress, Confirm a state by VLF-bit At the time of VLF=1: After a t_str wait, initial setting is necessary. At the time of VLF=0: Register access is possible. Figure 16 Oscillation start time chart (Power initial supply) RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 16: Reset By Software
Should be execute this command even if VLF is 0. Even if VLF is 1, it available after step5. 2ms wait is needed for RESET completion. Note: Except using this RESET sequence, never write 1 to a TEST- bit. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 17: Reference Information
approximately 1 second/day. Figure 18 Frequency vs Temperature characteristics There is a tool on our web that makes it easy to calculate the time error due to temperature. Please come to this "Link" RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 18: Application Notes
(6) Installation of charged battery. When a charged backup battery is installed by soldering, battery connection terminal of this device should connect to GND, beforehand. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 19: Overview Of Functions And Registers
Data can be recorded from 1/10024 second digit to year digit. 8) User RAM RAM register is read/write accessible for any data. Built-in 8bit × 64word (512bit) RAM When not use Timestamp function, it can use for users memory. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 20: Register Table
Time Stamp MONTH Time Stamp YEAR Status Stamp VDET No Function ▲ Over Write Control No Function SEC Alarm TBKON TBKE TMPIN TSTP Timer Control Time Stamp control 0 COMTG Command Trigger RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 21: Table 13 Register Table 2
Writing operation is ignored at any bit marked “No Function”. "▲" mark bits are must be cleared to 0. Afterward, be kept in 0, anytime. When writes 1 to "▲", it has possibility of current consumption is increased. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 22: Register Initial Value, And Read/Write Operation Table
Time Stamp HOUR Time Stamp WEEK Time Stamp DAY Time Stamp MONTH Time Stamp YEAR Status Stamp No Function Over Write Control SEC Alarm Timer Control Time Stamp control 0 Command Trigger RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 23: Table 15 Register Initial Value 2
Time stamp 1/256S Time Stamp SEC Time Stamp MIN Time Stamp HOUR Time Stamp DAY Time Stamp MONTH Time Stamp YEAR Status stamp X： Undefined 0 or 1 0： Reset state. 1： Set state. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 24: Description Of Registers
When STOP = 1, 32.768 kHz and 1024 Hz output is possible. But 1 Hz output is disabled. Switchover function cannot work in order that the V voltage drop detection stops even if a main power supply falls. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 25: Power Switching Circuit-Related Register Bank3 02H
This register is used to perform time stamp trigger. 13.3.7. RAM registers (Bank4, 5, 6, 7) This RAM register is read/write accessible for any data in the range from 0h to Fh. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 26: How To Use
Leap second adjustment For leap second adjustment, user can write “60” into SEC counter, after 1 second SEC counter is to be set “00”. Normally second counter counts up “59” to “00”. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 27: Week Counter
Leap year: year divisible by 4, year divisible by 400 Ex. 2000, 2004, 2008, 2012, 2096, 2400, 2800, Common year: year indivisible by 4, year divisible by 100 Ex. 2001, 2002, 2003, 2005, 2099, 2100, 2200, 2300, 2500,, RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 28: Wake-Up Timer Interrupt Function
The example of the error of the first countdown: A preset value is 04h. Internal source clock Cycle error Designated cycle 初回周期誤差 Down counter TF Flag ”0” ⇒ “1” Figure 20 Wake-up Timer Initial Sequence (cycle error) RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 29: Table 21 Te Bit (Timer Enable)
Note. as for INT-pin, Alarm, Wake-up Timer and Time update interrupts are output as OR. When a Wake-up timer interrupt event occurs, an interrupt signal is generated (/INT status changes from Hi-z to low). RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 30: Table 24 Tbkon, Tbke (Timer Backup On, Timer Backup/Normal Enable)
TSTP is invalid. and the countdown doesn't stop even if set in TSTP = 1. The count stops at the time of the setting of 64 Hz, 1 Hz,1/60 Hz. It doesn’t start counting RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 31: Wake-Up Timer Start Timing
16777216 1.13 h 72.81 h 4660 h 31.9 Year When the all counter value is set to 0b, the timer will not work. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 32: Diagram Of Wake-Up Timer Interrupt Function
After the interruption occurs when the count value changes from 1hto 0h, the counter automatically reloads the preset value and again starts to count down. (Repeated operation) The countdown that starts when the TE bit value changes from 0to 1 always begins from the preset value. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 33: Alarm Interrupt Function
DAY as the target for alarm interrupt events. Table 29 WADA bit (Week Alarm / Day Alarm Select) WADA Data Description Sets WEEK as target of alarm function Write Sets DAY as target of alarm function RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 34: Examples Of Alarm Settings
Second value is ignored. AEbit1 AEbit1 Alarm repeatedly generate for 1 minute at set time. of each month, for 30m00s each hour. AEbit1 Hour value is ignored Every day, at 6:59:30 PM X: Don't care RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... - Page 35 /INT Figure 25 Alarm Interrupt Black Diagram "1" AIE bit "0" Hi-z /INT output "L" "1" AF bit "0" Event occurs I nternal operation Write operation Figure 26 Alarm Interrupt Timing Chart RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
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Page 36: Time Update Interrupt Function
When a time update occurs, an interrupt signal is generated. /INT status changes from Hi-z to Low. 7.324 ms to 7.644 ms after the interrupt occurs, the active Low is automatically released. /INT status changes from Low to Hi-Z.(tRTN1) RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 37: Time Update Interrupt Function Diagram
"1" UF bit "0" period period period period The time updating. Seconds or I nternal operation Write operation tRTN1 : 7.324 ms to 7.644 ms. Figure 28 Time Update Interruption Timing Chart RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 38: Status Monitoring Function
Clear for the next detection. Write Ignored. XST was not detected. Read Crystal oscillation stop was detected. (The result is retained until this bit is cleared to zero.) This bit is not initialized in power-on reset. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 39: Fout Function [Clock Output Function]
At the time of the initial power-on, 0 is set to FSEL1, FSEL0. Note: effect of STOP bit to FOUT functions. When STOP = 1, 32768 Hz and 1024 Hz output is possible. But 1 Hz output is disabled. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 40: Battery Backup Switchover Function
Power supplied from V via diode first then Power supply supplied diode OR of V and V = ON: Normal mode Battery backup switchover function: ON INIEN bit = 1 = OFF: Backup mode RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 41: Table 47 Inien, Swsel Combination
Figure 30 Battery backup switchover control (Initial power on) Voltage detection intermittent timing Table 48 The timing of VDET1 (INIEN=1) (INIEN=0) Power supply (Backup mode) detection Stopped Once per 31.25 ms Always ON DET1 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 42: Table 49 Smpt Bit (Sample Time)
These SW1 OFF occur every second. Refer to Figure 31 Table 49 SMPT bit (sample time) SMPT1 SMPT 0 SW OFF time Always ON 2 ms 128 ms 256 ms Once per a Second. RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... - Page 43 14. How to use (ex. 2 ms) 2 ms (ex. 256 ms) 256 ms Figure 32 VDD voltage detection SW OFF intermittent operation RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
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Page 44: Time Stamp Function
Bank2-F Command Trigger Bank3- 4 Time Stamp Control 1 EISEL TSCLR TSRAM ▲ ▲ Bank3-5 EVDET EXST Time Stamp Control 2 Bank3-6 Time Stamp Control 3 TSFUL TSEMP TSAD2 TSAD1 TSAD0 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 45: Table 51 Evf Bit (Event Flag)
Control of overwriting of Time stamp record Table 53 OVW bit (Over Write) Data Description The recording is stopped with 8-time stamps, and it is not overwritten. Write Overwrite available Figure 34 OVW, pointer operation RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 46: Time Stamp Function Triggered By Spi Access
Fh is 0h. Time stamp Timing Dummy read Mode + Address(Ah + Fh) Time stamp trigger Trigger /INTpin Time stamp data New Time stamp data Register data Figure 35 Time Stamp SPI-Bus record timing RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 47: Time Stamp Record Register
Status stamp register Table 56 Status Stamp Address Function bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Bank2 – 9h Status Stamp VDET RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 48: Rtc Self Monitoring Time Stamp Function
6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Function Address Time Stamp EISEL TSCLR TSRAM Control 1 Time Stamp ▲ ▲ EVDET EXST Control 2 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 49: Multiple Time Stamp
When TSRAM = 1, the first time stamp is recorded in both Bank2 0h 8h and Bank4 0h 7h. Figure 38 Mixed usage of USER RAM and Time stamp RAM RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... - Page 50 Bank4 0h - 7h Bank4 8h - Fh Bank5 0h - 7h Bank5 8h - Fh Read Bank6 0h - 7h Bank6 8h - Fh Bank7 0h - 7h Bank7 8h - Fh, default RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
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Page 51: Flow Chart
Please set waiting time depending on load of a system optionally. Wait It takes about 200 ms from Power ON to oscillation start. VLF=0 ? Initialize Start-up complete Figure 39 Flow1 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... - Page 52 RAM register. In such cases, stop the fixed-cycle timer function by writing "0" to the TE and TIE bits. When initialization is finished, be sure to set STOP bit to “0”. Next procession Figure 40 Flow2 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
- Page 53 [s], clocking will start from that point. When STOP = 1, please be aware that the functions such as the voltage detection function stop. Figure 42 Flow4 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
- Page 54 TSTP,"1""0" Next process 2 When you want to restart from a pre-set value, please set a TE bit to “1” again after setting a TE bit to “0”. Figure 44 Flow6 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
- Page 55 Bank2 - Ch Select week or day in WADA bit. Bank1 - Dh Clear AF bit Select and set /INT output in AIE bit. Next process Figure 45 Flow7 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
- Page 56 Do not generate time stamps while reading time stamp data. Read the time stamp data. Bank2 - 0h 8h Clear EVF to "0". Bank1 - Eh Next process Figure 46 Flow8 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02...
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Page 57: Reading/Writing Data Via The Spi-Bus Interface
CE input falls. 14.10.3 Read of Data 1) One-shot reading Mode Address N Hi-Z Data N 2 ) Continuous reading Mode Address N Hi-Z Data N Data N+1 Data N+m RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 58: Connection Example
Pull up resister 1 kΩ to 5 kΩ is recommended. CR2032, etc. Please confirm DI, DO, CLK SPI compliant by oscilloscope. Please set 0.1 μF bypass capacitor near RTC pin. Figure 47 Typical MCU connection example RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 59: Tables
Table 55 Time Stamp Record Register......................46 Table 56 Status Stamp .............................46 Table 57 Time Stamp RAM control registers ....................47 Table 58 VDET bit (VDET) ..........................47 Table 59 XST bit (Crystal Oscillation Stop) .....................47 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 60: Figures
Figure 39 Flow2 ..............................51 Figure 40 Flow3 ..............................52 Figure 41 Flow4 ..............................52 Figure 42 Flow5 ..............................53 Figure 43 Flow6 ..............................53 Figure 44 Flow7 ..............................54 Figure 45 Flow8 ..............................55 Figure 46 Typical MCU connection example ....................57 RX4111CE Jump to Bottom Seiko Epson Corporation ETM62E-02... -
Page 61: Contacts
Epson Hong Kong Ltd. Unit 715-723 7/F Trade Square, 681 Cheung Sha Wan Road, Kowloon, Hong Kong www.epson.com.hk Epson Taiwan Technology & Trading Ltd. 15F, No.100, Songren Rd., Sinyi Dist.,Taipei City, 11073 Taiwan www.epson.com.tw/ElectronicComponent Epson Singapore Pte., Ltd. Electronic Devices Sales Division Alexandra Technopark Block B, #04-01/04 438B Alexandra Rd, Singapore 119968 www.epson.com.sg/electronic-devices...