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HP 3478A Technical Manual page 107

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3478A
3478A
Figure 7-F-13. Slope S+0 and
Figure 7-F-13.
Slope S+0 and S-0 Generation 
ference is that paths Y1 and Y2 are switched when the
ference is that paths Y1 and Y2 are switched when the
slopes are switched (YI to ground and Y2 to -Vref, or Y2
slopes are switched (YI to ground and Y2 to -Vref, or Y2
to ground and Y1 to -Vref).
to ground and Y1
to -Vref).
7-F-40. Runup
7-F-40.
Runup Time.
Time. The runup time changes with the
number of digits selected.
number of digits se
lected. For the 3
time is 1/600 second (for both the 60Hz and the 50Hz
time is 1/600 second (for both the 60Hz and the 50Hz
options) and is called .1
options) and
is called .1 PLC (Power
the 4 1/2 Digit mode, the time is 1/60 second (1/50
the 4 1/2 Digit mode, the time is 1/60 second (1/50
second for the 50 Hz optio
second for the
50 Hz option) and is called
1/2 Digit mode
1/2 Digit mode is different.
is different. In this mode,
for the runup time with the A/D operation repeated ten
for the runup time with the A/D operation repeated ten
times. The resultant ten
times.
The resultant ten readings are the
the answer becomes a single reading.
the answer becomes a single reading.
7-F-41.
7-F-41. Digit
Digit Generation.
Generation. When the 3478A is in the 4
1/2 and 5 1/2 Digit mode, the first two significant digits
1/2 and 5 1/2 Digit mode, the first two significant digits
(of the reading) are determined during
(of the reading) are determined
Digit mode, only
Digit mode,
only the first
the first digit is de
down, the three least significant digits are determined in
down, the three least significant digits are determined in
all modes.
all modes. A total of 5
A total of 5 /2 digits are de
/2 digits are developed in both the
51/2 and 4/2 digit
51/2 and
4/2 digit modes.
modes.
displayed in the 41/2 digit mode, the last digit in the
displayed in the 41/2 digit mode, the last digit in the
mode is rounded off to the next higher digit.
mode is rounded off to the next higher digit.
S-0 Generation 
The runup time changes with the
For the 3 1/2 Digit mode,
1/2 Digit mode, the
PLC (Power Line Cycles).
Line Cycles). For
n) and is called 1 PLC.
1 PLC. The 5
In this mode, 1 PLC is used
1 PLC is used
readings are then averaged and
n averaged and
When the 3478A is in the 4
during runup.
runup. In t
In the 3
digit is determined.
termined.
veloped in both the
Since only
Since only 412 digits
412 digits are
Figure 7-F-14.
Figure 7-
7-F-42.
7-F-42.
voltage at the A/D Converter's input is removed and the
voltage at the A/D Converter's input is removed and the
input is the
input is then connected t
tion then starts.
tion then sta
least significant digits of the 3478A's reading.
least significant digits of the 3478A's reading.
7-F-43.
7-F-43. After runup,
the integrator with its amplitude and polarity dependent
the integrator with its amplitude and polarity dependent
on the last current applied (S + 4 or S-4) and the input
on the last current applied (S + 4 or S-4) and the input
voltage (applied during runup).
voltage (applied
the remaining voltage, the least significant digits
the remaining voltage, the least significant digits can then
be determined.
be
determined.
applying various currents to the integrator and counting
applying various currents to the integrator and counting
the number of of times the currents have to be applied
the number of of times the currents have to be applied
for the resultant output slopes of the integrator to cross
for the resultant output slopes of the integrator to cross
zero.
zero.
7-F-44. The currents applied
7-F-44.
the S-4, S + 4, S-3, S + 2, S-1, and S + 1 currents and
the S-4, S + 4, S-3, S + 2, S-1, and S + 1 currents and
the resultant output slopes are the S-4, S + 4, S-3, S + 2,
the resultant output slopes are the S-4, S + 4, S-3, S + 2,
S-1, and S + 1 slopes.
S-1, and S +
4, etc.) are applied (in the given
4, etc.) are applied (in the given order) to the integrator a
set number of t
set number of times until zero cro
exception is the first S4 current (see paragraph 7-F-45
exception is the first S4 current (see paragraph 7-F-45
step c).
step c). The first and second
the S-4 and S + 4 currents, r
the S-4 and
have the same value as the S-4 and S + 4 currents used
have the same value as the S-4 and S + 4 currents used
the
in the runup operation, but ar
in the runup
S-4 and S + 4 slopes are each 15 ALE cycles long (30
S-4 and S + 4 slopes are each 15 ALE cycles long (30
For
ALE cy
ALE cycles in
cles in runup) and
next currents applied (in order) are the S-3, S + 2,
next currents applied (in order) are the S-3, S + 2, and S-
The 5
1 currents, with S- slopes applied between them.
1 currents, with S- slopes applied between them.
7-F-45.
7-F-45.
periods, as shown in
periods, as shown in Figure 7-F-14.
for the following explanation on the rundown opera- tion.
for the following explanation on the rundown opera- tion.
a. a. When r
remaining voltage on the integrator is determined by the
remaining voltage on the integrator is determined by the
A/D Controller (U462).
A/D Controller (U46
he 3 ½ ½
output state of the A/D comparator (CMP output at U403
output state of the A/D comparator (CMP output at U403
In run-
In run-
pin 11). A high output level show
pin 11).
a low level shows a negative voltage.
a low level shows a negative voltage.
are
F-14. Rundown Slope
Rundown Slopes  s 
7-F-13
7-F-13
Rundown.
Rundown.
When runup is completed, the
When runup is completed, the
n connected to ground.
o ground. The rundown opera-
rts. Rundown is used to dete
Rundown is used to determine the three
After runup, a voltage
a voltage (or charge) re
during runup). By obtaining
The
The voltage
voltage value
The currents applied to the int
to the integrator are
1 slopes. Each one of the currents (S4,
Each one of the currents (S4, S +
imes until zero crossing occurs.
The first and second set of currents
set of currents applied are
S + 4 currents, respectively.
espectively. These currents
operation, but are applied half as long.
e applied half as long. The
runup) and are called
are called half-ramps.
Rundown
Rundown time
time is separ
is separated
 Figure 7-F-14. Refer
When rund
undown
own sta
starts
rts, th
2). The polarity is det
The polarity is determined by the
A high output level shows a positive voltage and
TM 11-6625-3071-14
TM 11-6625-3071-14
The rundown opera-
rmine the three
(or charge) remains on
mains on
By obtaining the value of
the value of
can then
value is obt
is obtained
ained by
by
egrator are called
called
S +
order) to the integrator a
ssing occurs. The only
The only
applied are
These currents
The
half-ramps. The
The
and S-
ated into
into five t
five time
ime
Refer to to the
the figure
figure
, the pol
e polari
arity ty of th
of the e
ermined by the
s a positive voltage and

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