Panasonic PAN9520 Integration Manual page 22


PAN9520 Wi-Fi Module
FCC (USA) and IC (Canada)
Standard
802.11b
802.11g & 802.11n
802.11g & 802.11n
802.11n
All limits have been determined using the module's integrated chip antenna. To limit the power,
there are several options that are explained in this section. These are:
•
Using a phy_init_data binary (stored into a corelated partition) to limit the power for
each channel and modulation (ESP-IDF and AT firmware)
"phy_init_data"
•
Editing and using the phy_init_data implemented in the user application's source
code (ESP-IDF)
Using "phy_init_data" Binary
6.1.2.1
The physical (PHY) layer is controlled by a "phy init data" set. This can be defined in the
application source code or it can be stored into a separate partition of the module's Flash
memory.
This section explains
•
how the data is composed,
•
how it can be stored, and
•
how the user application can be configured to use the data stored in the partition.
Binaries for applying settings that comply with the RED or FCC/IC regulations are provided by
Panasonic. The data can be flashed and is used by the hardware if a related partition is
reserved in the partition table and the setting
CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION in the project configurations is set to "y".
"Phy Init Data" Structure
The data is composed of 128 bytes that configure the device's PHY layer. The data that is
flashed into the corresponding partition contains 16 bytes more (8 bytes at the beginning and
8 bytes at the end). Byte positions stated in this section are relative to start of the stored data
(binary data). Six power values can be stored and used for configuration. Power settings can be
defined for different data rates (standards and modulations). Additionally, the maximum power
can be configured for each channel.
The process for configuring/editing "phy init data" consists mainly of three steps:
1. Defining six power values,
2. Setting up the power levels for each available standard, and
3. Modulation and defining power limits for each available channel.
Module Integration Guide Rev. 1.1
Affected Channels
1 to 11
3 to 9 (20 MHz)
1, 2, 10, and 11 (20 MHz)
All 40 MHz channels
Binary.
 6.1.2.2 Editing "Phy Init Data" in the Source
6 Regulatory and Certification Information
Power Limit
 6.1.2.1 Using
Code.
18 dBm
16 dBm
13 dBm
11 dBm
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