Epson RA8804 CE Applications Manual page 26

RA8804 CE
7) EIE (EVIN Interrupt Enable) bit
When valid event input occurs (when the EIF bit value changes from "0" to "1"), this bit's value specifies whether
an interrupt signal is generated (/INT status changes from Hi-Z to low) or is not generated. (/INT status remains
Hi-Z).
EIE
Data
Write/Read
(8) EVMON (EVENT Monitor) bit
EVMON can read the EVIN input level.
EVMON Data
Write/Read
9) ET1bit, ET0 bit Setup debounce duration.
debounce duration.
ET0, 1 ET1
Write/Read 0
0
1
1
Active area of input signal of EVIN terminal.
Detectable signal.
Ignored signal.
Detection clock.
Selected detection duration by
ET0 and ET1
(10) EF (Event trigger Flag) bit
EF Data
Write/Read
1) When a EVIN interrupt event occurs, an interrupt signal is not generated or
is canceled (/INT status remains Hi-Z).
2) When a EVIN interrupt event occurs, the interrupt signal is canceled (/INT
0
status changes from low to Hi-Z).
 Even when the EIE bit value is "0" another interrupt event may change the
/INT status to low (or may hold /INT ="L").
When a EVIN interrupt event occurs, an interrupt signal is generated (/INT
status changes from Hi-Z to low).
1
 When a EVIN interrupt event has been generated low-level output from the
/INT pin occurs only when the value of the control register's EIE bit is "1".
Function
0 The input level of EVIN is LOW.
1 The input level of EVIN is HIGH.
ET0 duration
0 No filtered (*1)
1 3.9 ms
0 15.6 ms
1 125 ms
Trigger input was not detected from EVIN terminal.
0
When clears to 0, INT output of EVIN are disabled, immediately.
Trigger input was detected from EVIN terminal.
1
EF bit is only cleared by 0.
Description
(*1) Input sensibility.
Input signal width is needed more than about 1µs.
Function
1 writing is ignored
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