7.4.2
DTV T2 reception
The Front-End for DVT part consist of the following key
components:
•
TUNER EUROPE SUT-RE231ZN
•
SCALER MT5596LGIJ HSBGA-757
•
DEMODULATOR CXD2837ER-T4 VQFN 48 for T and S
models
Below find a block diagram of the front-end application for DTV
part.
SUT-RE231ZN
I
2
C
IF-AGC
IF_AGC
RF_AGC
Figure 7-7 Front-End DVB-T2 DTV block diagram
7.4.3
Front-End DTV-S2 reception
The Front-End for ISTB part consist of the following key
components:
•
TUNER EUROPE SUT-RE231ZN
•
SCALER MT5596LGIJ HSBGA-757
•
DEMODULATOR CXD2837ER-T4 VQFN 48
Below find a block diagram of the front-end application for DTV
part.
S2 function
S2 tuner
LNB power
Tuner I2C
S2 Demond
CXD2837ER
IP/IN/OP/ON
Tuner I2C
Figure 7-8 Front-End DVB-S2 DTV block diagram
2
I
C
IF
DECODER
CXD2837ER
TS DATA
I
2
MT5596L
20110_204.eps
System I2C
MT5596L
TS DATA
20110_205.eps
Circuit Descriptions
7.5
HDMI
Refer to figure
RX
TX
I
2
CN501
HDMI1
C
The following HDMI connector can be used:
•
HDMI 1: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
•
HDMI 2: HDMI input ( TV digital interface support HDCP)
with digital audio/PC DVI input/ARC
•
HDMI 3: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
•
HDMI 4: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
•
+5V detection mechanism
•
Stable clock detection mechanism
•
HPD control
•
Sync detection
•
TMDS output control
•
CEC control
•
ARC control
•
MHL control
7.6
Video and Audio Processing - MT5596LGIJ
HSBGA-757
The MT5596LGIJ HSBGA-757 is the main audio and video
processor (or System-on-Chip) for this platform. It has the
following features:
•
worldwide multi-standard analo g TV demodulator
•
ATSC /DVB-T /DVB-C/DTMB demodulators
•
Ture 120HZ Full HD MJC
•
Power CPU core
•
3D graphic support OpenGL ES 1.1/2.0
•
A muti-standard video decoder
•
A transport de-multiplexer
•
One HDMI 2.0 receiver with 3D support
•
MHL2.0& Standby charging
•
2D/3D converter
•
Rich format audio codec
•
Local dimming (LED backlight)
•
Ethernet MAC+PHY
•
TCON
•
Panel overdrive control
•
Four-link LVDS, mini-LVDS,V-by-one, EPI
The MT5596L family provides consumers with aUHD 60HZ
direct drive.
The MT5596L family consists of a DTV front-end demodulator,
a backend decoder and a TV controller and offers high
integration for advanced applications. It integrates a transport
de-multiplexer, a high definition video decoder, an audio
decoder, a four-link LVDS transmitter, a mini-LVDS transmitter,
a V-by-one transmitter, an EPI transmitter, and an
NTSC/PAL/SECAM TV decoder with 3D
combfilter(NTSC/PAL).
back to
div.table
TPL16.1E LA
7-9 HDMI input configuration
MT5596L
C
TX
I
2
C
I
2
C
RX
RX
CN502
CN503
HDMI2
HDMI3
Figure 7-9 HDMI input configuration
7.
EN 37
for the application.
2
I
C
TX
RX
CN504
HDMI4
20110_206.eps
2016-Sep-23