B 715G8132 Ssb - Philips 43PUH6101/88 Service Manual

Tpl16.1e chassis
Hide thumbs Also See for 43PUH6101/88:
Table of Contents

Advertisement

Circuit Diagrams and PWB Layouts

10.5 B 715G8132 SSB

10-5-1
Power 1
Power 1
B01
U401-1
U401-1
ARA0
ARDQM0
ARDQM0
R5
N5
ARA0
ARDQM0
ARA1
ARDQS0
ARDQS0
AB6
V1
ARA1
ARDQS0
ARA2
ARDQS0B
ARDQS0B
W7
V2
ARA2
ARDQS0#
ARA3
Y6
R2
ARDQ0
ARDQ0
ARA3
ARDQ0
ARA4
AC6
AB2
ARDQ1
ARDQ1
ARA4
ARDQ1
ARA5
R7
R1
ARDQ2
ARDQ2
ARA5
ARDQ2
ARA6
AD6
AB3
ARDQ3
ARDQ3
ARA6
ARDQ3
ARA7
ARDQ4
ARDQ4
T5
P1
ARA7
ARDQ4
ARA8
ARDQ5
ARDQ5
Y5
AC3
ARA8
ARDQ5
ARA9
ARDQ6
ARDQ6
U5
P3
ARA9
ARDQ6
ARA10
ARDQ7
ARDQ7
AC7
AC1
ARA10
ARDQ7
ARA11
AA5
ARA11
ARA12
AC5
N7
ARDQM1
ARDQM1
ARA12
ARDQM1
ARA13
R6
W2
ARDQS1
ARDQS1
ARA13
ARDQS1
ARA14
U7
W3
ARDQS1B
ARDQS1B
ARA14
ARDQS1#
ARDQ8
ARDQ8
Y3
ARDQ8
ARDQ9
ARDQ9
T3
ARDQ9
ARBA0
ARDQ10
ARDQ10
AB5
AA2
ARBA0
ARDQ10
ARBA1
ARDQ11
ARDQ11
AD5
T2
ARBA1
ARDQ11
ARBA2
ARDQ12
ARDQ12
P6
Y1
ARBA2
ARDQ12
U1
ARDQ13
ARDQ13
ARDQ13
ARCS
N2
AA1
ARDQ14
ARDQ14
ARCS
ARDQ14
ARCSD
N3
U3
ARDQ15
ARDQ15
ARCSD
ARDQ15
ARRAS
N6
ARRAS
ARCAS
ARDQM2
ARDQM2
P7
AG4
ARCAS
ARDQM2
ARWE
ARDQS2
ARDQS2
AA6
AH2
ARWE
ARDQS2
ARODT
ARDQS2B
ARDQS2B
N4
AH3
ARODT
ARDQS2#
ARCKE
ARDQ16
ARDQ16
U6
AE3
ARCKE
ARDQ16
ARRESET#
V6
AL2
ARDQ17
ARDQ17
ARRESET#
ARDQ17
AE2
ARDQ18
ARDQ18
ARDQ18
ARCLK0
M2
AM1
ARDQ19
ARDQ19
ARCLK
ARDQ19
ARCLK0B
ARDQ20
ARDQ20
M1
AD1
ARCLK#
ARDQ20
ARDQ21
ARDQ21
AN1
ARDQ21
DDRVREF_A1
ARDQ22
ARDQ22
L2
AD2
DDRVREF_A1
ARDQ22
DDRVREF_A2
ARDQ23
ARDQ23
AL1
AM2
DDRVREF_A2
ARDQ23
AF5
ARDQM3
ARDQM3
ARDQM3
ARTN
M8
AJ1
ARDQS3
ARDQS3
ARTN
ARDQS3
AK3
ARDQS3B
ARDQS3B
ARDQS3#
AJ3
ARDQ24
ARDQ24
ARDQ24
R460
R460
ARDQ25
ARDQ25
AF3
ARDQ25
ARDQ26
ARDQ26
47R 1/16W 5%
47R 1/16W 5%
AK2
ARDQ26
ARDQ27
ARDQ27
AF1
ARDQ27
ARDQ28
ARDQ28
AG5
ARDQ28
ARDQ29
ARDQ29
AG1
ARDQ29
AK4
AK1
ARDQ30
ARDQ30
DDRV
DDRV
ARDQ30
AJ5
AG2
ARDQ31
ARDQ31
DDRV
ARDQ31
AK5
DDRV
AL5
DDRV
AVDD33_DDR
AVDD33_DDR
AH6
L1
DDRV
AVDD33_DDR
AVDD10_DDR
AVDD10_DDR
AJ6
AC18
DDRV
AVDD10_DDR
AG7
DDRV
AH7
DDRV
AF8
L4
DDRV
AVSS_DDR
V9
AC17
DDRV
AVSS_DDR
W9
DDRV
AB9
DDRV
U9
DDRV_CKA
DRAM K4B4G1646E-BCMA 4Gb FBGA-96
MT5596L
MT5596L
DVDD3V3
AVDD33_DDR
R463
R463
VCCK
AVDD33_DDR
0R05 1/16W
0R05 1/16W
C426
C426
1UF 6.3V
1UF 6.3V
R465
R465
0R05 1/16W
0R05 1/16W
AVSS33_DDR
VCCK
AVDD10_DDR
R466
R466
0R05 1/16W
0R05 1/16W
R464
R464
AVDD10_DDR
Reseved on bottom side.
0R05 1/16W
0R05 1/16W
C427
C427
100N 16V
100N 16V
AVSS_DDR
DRAM#1/2 Bypass Cap
DDRV
C429
C429
C430
C430
C431
C431
C432
C432
C433
C433
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
DDRV
Bottom Side DRAM#1 Bypass Cap
C437
C437
C438
C438
C439
C439
C435
C435
C436
C436
10uF 6.3V
10uF 6.3V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
10UF
10UF
Bottom Side DRAM#2 Bypass Cap
DDRV
C448
C448
C449
C449
C450
C450
C446
C446
C447
C447
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
10uF 6.3V
10uF 6.3V
10UF
10UF
TPL16.1E LA
10.
DDRV
DDR3#1
U402
U402
K4B4G1646E-BCMA
K4B4G1646E-BCMA
1_A0
1_A0
N3
A0
1_A1
1_A1
P7
A1
1_A2
1_A2
P3
A2
1_A3
1_A3
N2
H1
DDRVREF_A1
A3
VREF_DQ
1_A4
1_A4
P8
M8
A_VREFCA1
A4
VREF_CA
1_A5
1_A5
P2
A5
1_A6
1_A6
ARDQ0
R8
E3
A6
DQL0
1_A7
1_A7
ARDQ1
R2
F7
A7
DQL1
1_A8
1_A8
ARDQ2
T8
F2
A8
DQL2
1_A9
1_A9
ARDQ3
R3
F8
A9
DQL3
1_A10
1_A10
L7
H3
ARDQ4
A10/AP
DQL4
1_A11
1_A11
R7
H8
ARDQ5
A11
DQL5
1_A12
1_A12
N7
G2
ARDQ6
A12/BC
DQL6
1_A13
ARDQ7
T3
H7
A13
DQL7
1_A14
ARDQ8
T7
D7
A14
DQU0
ARDQ9
M7
C3
NC_A15
DQU1
ARDQ10
C8
DQU2
1_BA0
1_BA0
ARDQ11
M2
C2
BA0
DQU3
1_BA1
1_BA1
N8
A7
ARDQ12
BA1
DQU4
1_BA2
1_BA2
M3
A2
ARDQ13
BA2
DQU5
B8
ARDQ14
DQU6
ARCLK0
ARCLK0
ARDQ15
J7
A3
CK
DQU7
ARCLK0B
ARCLK0B
K7
CK
ARDQS0
F3
LDQS
1_CKE
1_CKE
ARDQS0B
K9
G3
CKE
LDQS
1_ARCS
1_ARCS
L2
C7
ARDQS1
CS
UDQS
B7
ARDQS1B
UDQS
1_RAS#
1_RAS#
J3
RAS
1_CAS#
1_CAS#
K3
E7
ARDQM0
CAS
LDM
1_WE#
1_WE#
ARDQM1
L3
D3
WE
UDM
1_RREST_MEM
1_ODT
1_ODT
T2
K1
RST
ODT
A_ZQ1
L8
ZQ
R461
R461
240R 1%
240R 1%
1_A10
ARA10
ARA10
2_A10
ARA10
1_BA1
ARBA1
ARBA1
2_BA1
ARBA1
1_A12
ARA12
ARA12
2_A12
ARA12
AVDD10_DDR
1_A4
ARA4
ARA4
2_A4
ARA4
1_A7
ARA7
ARA7
2_A7
ARA7
1_A13
ARA13
ARA13
2_A13
ARA13
1_A9
ARA9
ARA9
2_A9
ARA9
AVDD10_DDR
1_RREST_MEM
ARRESET#
ARRESET#
2_RREST_MEM
ARRESET#
1_A6
ARA6
ARA6
2_A6
ARA6
1_A1
ARA1
ARA1
2_A1
ARA1
C428
C428
1_A8
ARA8
ARA8
2_A8
ARA8
1_A11
ARA11
ARA11
2_A11
ARA11
1uF 10V
1uF 10V
AVSS_DDR
1_CAS#
ARCAS
ARCAS
2_CAS#
ARCAS
1_BA2
ARBA2
ARBA2
2_BA2
ARBA2
1_A0
ARA0
ARA0
2_A0
ARA0
1_A5
ARA5
ARA5
2_A5
ARA5
1_A14
ARA14
ARA14
ARRAS
2_RAS#
1_RAS#
ARRAS
ARRAS
ARA14
2_A14
1_A2
ARA2
ARA2
2_A2
ARA2
1_BA0
ARBA0
ARBA0
2_BA0
ARBA0
1_A3
ARA3
ARA3
2_A3
ARA3
1_WE#
ARWE
ARWE
2_WE#
ARWE
ARCS
1_ARCS
ARCSD
2_ARCSD
DDRVREF_A1
R467
R467
A_VREFCA1
NC/0R05 1/16W
NC/0R05 1/16W
DDRVREF_A2
R468
R468
A_VREFCA2
NC/0R05 1/16W
NC/0R05 1/16W
C434
C434
ARCKE
1_CKE
R469
R469
2_CKE
100N 16V
100N 16V
47R 1/16W 5%
47R 1/16W 5%
R470
R470
ARODT
1_ODT
2_ODT
47R 1/16W 5%
47R 1/16W 5%
R471
R471
C406
C406
DDRV
NC/47K +-1% 1/16W
NC/47K +-1% 1/16W
ARRESET#
NC/100NF 16V
NC/100NF 16V
C440
C440
C441
C441
C442
C442
C443
C443
C444
C444
C445
C445
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
C451
C451
C452
C452
C453
C453
C454
C454
C455
C455
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
100N 16V
EN 69
DDRV
DDR3#2
U403
U403
K4B4G1646E-BCMA
K4B4G1646E-BCMA
2_A0
2_A0
N3
A0
2_A1
2_A1
P7
A1
2_A2
2_A2
P3
A2
2_A3
2_A3
N2
H1
DDRVREF_A2
A3
VREF_DQ
2_A4
2_A4
P8
M8
A_VREFCA2
A4
VREF_CA
2_A5
2_A5
P2
A5
2_A6
2_A6
ARDQ16
R8
E3
A6
DQL0
C424
C424
2_A7
2_A7
ARDQ17
R2
F7
A7
DQL1
100N 16V
100N 16V
2_A8
2_A8
ARDQ18
T8
F2
A8
DQL2
2_A9
2_A9
ARDQ19
R3
F8
A9
DQL3
2_A10
2_A10
L7
H3
ARDQ20
A10/AP
DQL4
2_A11
2_A11
R7
H8
ARDQ21
A11
DQL5
2_A12
2_A12
N7
G2
ARDQ22
A12/BC
DQL6
2_A13
2_A13
ARDQ23
T3
H7
A13
DQL7
2_A14
2_A14
ARDQ24
T7
D7
A14
DQU0
ARDQ25
M7
C3
NC_A15
DQU1
ARDQ26
C8
DQU2
2_BA0
2_BA0
ARDQ27
M2
C2
BA0
DQU3
2_BA1
2_BA1
N8
A7
ARDQ28
BA1
DQU4
2_BA2
2_BA2
M3
A2
ARDQ29
BA2
DQU5
B8
ARDQ30
DQU6
ARCLK0
ARCLK0
ARDQ31
J7
A3
CK
DQU7
ARCLK0B
ARCLK0B
K7
CK
ARDQS2
F3
LDQS
2_CKE
2_CKE
ARDQS2B
K9
G3
CKE
LDQS
2_ARCSD
2_ARCSD
L2
C7
ARDQS3
CS
UDQS
B7
ARDQS3B
UDQS
2_RAS#
2_RAS#
J3
RAS
2_CAS#
2_CAS#
K3
E7
ARDQM2
CAS
LDM
2_WE#
2_WE#
ARDQM3
L3
D3
WE
UDM
2_RREST_MEM
2_ODT
2_ODT
T2
K1
RST
ODT
A_ZQ2
L8
ZQ
R462
R462
240R 1%
240R 1%
DRAM#1/2 Bottom Layer
DDRV
C456
C456
C457
C457
C458
C458
C459
C459
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
Differential Clock
ARCLK0
ARCLK0
ARCLK0
R472
R472
100R 1/16W 1%
100R 1/16W 1%
ARCLK0B
ARCLK0B
ARCLK0B
DDRV
DDR3#1 Ref Volt.
DDRV
DDR3#2 Ref Volt.
R473
R473
C460
C460
R475
R475
C462
C462
100N 16V
100N 16V
100N 16V
100N 16V
1K 1/16W 5%
1K 1/16W 5%
1K 1/16W 5%
1K 1/16W 5%
A_VREFCA1
A_VREFCA2
R474
R474
C461
C461
R476
R476
C463
C463
100N 16V
100N 16V
100N 16V
100N 16V
1K 1/16W 5%
1K 1/16W 5%
1K 1/16W 5%
1K 1/16W 5%
Bottom Side Capacitors close to IC
DDRV
C464
C464
C465
C465
C466
C466
C467
C467
C468
C468
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
100NF 16V
NC/10UF
NC/10UF
NC/10UF
NC/10UF
back to
2016-Sep-23
div.table
GND
3,5,6,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,26,27
DDRV
DDRV
5,8
DVDD3V3
DVDD3V3 3,5,6,9,10,12,13,14,15,17,19,27
VCCK
VCCK
3,5,6,19
C425
C425
100N 16V
100N 16V
C469
C469
1UF 6.3V
1UF 6.3V
Power 1
B01
C
2016-01-26
715G8132
19880_506.eps

Advertisement

Table of Contents
loading

Table of Contents