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Comparison of CD-DSP Functions
Model
Function
EFM-PLL
RAM
Replay speed
Digital out
Interpolation
Zero cross mute
Level meter peak search
Bilingual
Digital attenuator
Digital filter
Digital Deemphasis
Output
General Ports
I/O
VCD compatible
Anti-shock I/F
Anti-shock controller
CD text
CD-ROM I/F
One-bit D/A converter
L.P.F
Power supply voltage
Package
*Notes: 16M DRAM max
(4M DRAM max)
Notes on Application Design
While it goes without saying that to achieve system reliability the absolute maximum ratings and allowable operating
conditions specified for this IC must be strictly adhered to, adequate consideration must also be given to the operating
environmental conditions, such as ambient temperature and static electricity, and to the mounting conditions used.
This section presents items that require special care during application design and IC mounting.
Handling of Unused Pins
• If unused input pins on this IC are left in the open state during IC operation, there are times when the IC may enter an
unstable state. Always follow all the directions for handling unused pins included in the documentation for this IC.
Also, do not connect any output pins to power supply, ground, or any other output lines.
• All general-purpose I/O ports must either be set to the output state and set to output a low level in software, or must be
left in the input state and pulled up or pulled down to a fixed input level.
Latch-up Prevention
• Due to the structure of this IC, all supply voltage pins must be supplied with the same potential.
— Also supply the same potential to the servo system ASP. The slice level control circuit is shared with this IC, and
application of the same potential is necessary. Also, the same potential must be supplied to all supply voltage pins
on the ASP IC.
• Do not allow the pin voltages on any of the input or output pins to exceed V
signal application requires special care at power on to assure that this condition is met.
• Do not allow overvoltages or abnormal noise to be applied to this IC.
• In general, latch-up can be prevented by tying any unused pins to either V
special instructions provided with this IC for unused pin handling.
• Do not short the outputs.
LC78621E
LC78625E
Internal VCO
Internal VCO
FR = 1.2kΩ
FR = 1.2kΩ
16k
16k
2×
2×
4
4
–12dB, –∞
–12dB, –∞
8fs
8fs
2
2
×
(4)
×
×
×
×
×
×
×
3.6 to 5.5 V
3.0 to 5.5 V
QFP80E
QFP80E
LC78626KE
LC78630E
LC78624E
Internal VCO
Internal VCO
FR = 1.2kΩ
FR = 1.2kΩ
18k
16k
4×
2×
2
2
–∞
–∞
×
×
×
×
×
2fs
×
×
2
2 + (4)
5
×
×
×
×
×
×
×
×
×
×
3.6 to 5.5 V
3.0 to 5.5 V
QFP80E
QFP64E
DD
DD
LC78626KE
LC78622E
(LC78626E)
(LC78622NE)
Internal VCO
Internal VCO
FR = 1.2kΩ (5.1kΩ)
FR = 1.2kΩ
16k
2×
2
–∞
×
8fs (4fs)
4fs (8fs)
×
1 + (3)
×
Not necessary
*
×
×
3.0 to 3.6 V (3.0 to 5.5 V)
3.0 to 5.5 V
QFP100E
QFP64E
or to fall lower than V
SS
or VSS. However, be sure to follow any
continued on next page.
16k
2×
2
–∞
×
× (3)
5
×
×
×
×
×
. The timing of
No. 5995-31/34
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