Section Iv - Principles Of Operation; Functional Description; Inp Microprocessor - HP 3000 Series Installation And Service Manual

PRINCIPLES OF OPERATION
I
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This section contains functional-level and system-level descrip-
tions of the HP 30020A Intelligent Network Processor (INP). The
functional description lists the major functional areas and
briefly describes each of them. An example of a typical
functional-level operation follows, which serves to summarize the
functional description. Then, an overview of the system-level
operation briefly discusses INP operations in relation to the HP
3000 Ser ies 30 or Ser ies 33 Computer System.
4-1. FUNCTIONAL DESCRIPTION
The HP 30020A Intelligent Network Processor
following major functional areas:
• INP Microprocessor
• Read-Only Memory (ROM)
• Random Access Memory (RAM)
• Direct Memory Access (DMA)
• SDLC and BISYNC Datacomm
• Commun ica tion Line Inter faces
includes the
A block diagram of INP organization of the major functional areas
is shown in figure 4-1. The solid interconnecting lines in the
block diagram represent data paths while the broken lines
indicate service request paths.
4-2. INP Microprocessor
The Complementary-Metal-Qxide-Semiconductor / Silicon-on-Sapphire
(CMOS/SOS) Micr op roces sor is the hear t of the INP. I t is a high-
performance, low-power-consumption microprocessor primarily used
in controller applications. It offers a one-microsecond typical
instruction cycle time to execute any of the fixed-width, 16-bit
instructions. These instructions can process one-, four-,
eight-, or sixteen-bit fields. The fast instruction cycle time
4-1