HP 3320A Operating And Service Manual page 123

Frequency
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I
~~-
.~"
BCD
"PU~ ~,7.;
..• ,.)"
NOTE 5: Jumpers on the A24B Assembly for ICll and IC12 are
preset at the factory:
IC12 Jumpered for BCD 7
ICll Jumpered for BCD 3
The Complement /D/ input controls the BCD output (Dl, D2, D4,
D8l. With the Complement /D/ input high (""+5 V), the direct BCD
sum of inputs
#1
and
#2
are applied to the BCD Output. With the
Complement /0/ input low
(~-5
V). the 9's complement of the two
inputs is applied to the BCD Output. The BCD Output lines have
internal pull-up resistors.
3320B STANDARD, 50
n
Impedance
(Preset No. 73)
r
FOR IC II
FOR ICI2
~
~
1(+5Y)
o
ONE
TEN
1
jQr-
8~08l ~
a
~O(GNO)
3320A/B 8
3~~B
Transistor
01
inhibits a Carry·ln signal to ICg when the Amplitude
Sign is positive. Transistors 02, 03 and associated circuits (IC13, 14
and 15) control the level of the Complement ID/ input.
3320B OPTION 001,75
n
Impedance
(Preset No. 75)
IC12 Jumpered for BCD 7
ICll Jumpered for BCD 5
NOTE 4: IC9,lO,ll or 120perateasa BCD Adder. The two BCD
Inputs
(#1
and
#2)
are summed together and applied to the BCD
Output. The BCD inputs and output lines are high true logic. A true
signal on the A Sign input indicates a negative amplitude number
(i.e .. -10.00 dBml. The BCD Input
#2
is a "hard wired" input,
preset by means of jumper wires on the pc assembly. See Note 5.
GNC
the input on pins 9 and 10 is
~nput
on pin
5
is inverted and
CODE
Digit
1 2 4 8
a
a a a a
1
1
a a a
2
a
1
a a
3
1 1
a a
4
a a
1
a
5
1
a
1
a
6
a
1 1
a
7
1 1 1
a
B
a a a
1
9
1
a a
1
2A
28
2C
20
POSITIVE LOGIC
IY
0
(IA' IS"IC)
+
i
,C' I ~"F
i
Z'f.
12A.2Bl
+
I 2(·2D1
NOTE 3: BCD Low true logic, switch contact(s) to ground is true
state.
L Data Valid - indicates the data valid line should
be
0 V when
a data valid signal is present.
In Local Mode (A Low, B High)
inverted and applied to pin 8. The
applied to pin 6.
H
+5V
L
a v
NOTE 2: In Remote Mode (A High, B Low) the input on pins 12
and 13 is inverted and applied to pin 8. The input on pin 3 is
inverted and applied to pin 6.
Example:
H Delay Flag - indicates the delay flag line should be + 5 V
when a delay flag signal is present.
NOTE 1: Logic signal levels are shown by the letters H or L
preceding the name of the line. The Hand L indicates the true state
(signal present). Voltage levels for the Hand L are:
I
I
I
I
I
I
I
I
I
I
I
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