Motorola APX 7000 Detailed Service Manual page 38

3-14
3.1.2.4 UHF2 Front-End
From the first band select switch, U1122, a UHF2 signal is routed to the first pre-selector filter
followed by a Low Noise Amplifier (LNA) and a second pre-selector filter. Both filters are discrete and
tunable designs and are used to band limit the incoming energy and suppress known spurious
responses such as Image spur. The LNA active device is an NPN transistor (U1932) with active bias
provided by transistor pair Q1922. The output of the second pre-selector filter is applied to a discrete
Low Pass Filter (LPF). The output of the LPF is applied to the RF port of the Mixer IC via a second
band select switch, U501. The Mixer IC, U506, is driven by a Local Oscillator (LO) signal generated
by the Trident synthesizer IC, U702, at the LO port to down-convert the RF signal to a 109.65 MHz
intermediate frequency (IF). It is a passive, high linearity design with balanced inputs at the RF and
IF ports and internal LO buffer. The down converted IF signal is passed through a 3-pole crystal filter,
FL501, and an IF amplifier, Q503, which drives the input of the Analog to Digital Converter IC, U601.
3.1.2.5 Analog To Digital Converter
The ADC used in APX is the AD9864 IC, U601, from Analog Devices. The IC front end down
converts the first IF to a second IF, a 2.25 MHz signal, by mixing a 107.4 MHz LO signal generated
by an integrated synthesizer and external VCO with active device U602 and resonator L604. The
second IF is sampled at 18 MHz, a signal generated by an integrated clock synthesizer and VCO
device with external resonator L605.
The sampled signal is decimated by a factor of 900 to 20 kHz and converted to SSI format at the
ADC's output. The Serial Synchronous Interface (SSI) serial data waveform is composed of a 16 bit
in-phase word (I) followed by a 16 bit Quadrature word (Q). A 20 kHz Frame Synch and 1.2MHz
clock waveform are used to synchronize the SSI IQ data transfer to the Digital Signal Processor IC
(OMAP) for post-processing and demodulation. The clock frequency is adjustable and is selected
automatically by software to prevent self quieting.
3.1.3 Transmitter
The transmitter takes modulated RF from the FGU and amplifies it to the rated output power to
produce the modulated carrier at the antenna.
NOTE: Refer to
transmitter-related schematics that will aid in the following discussion.
The transmitter
the VHF band and one for the 7/800 MHz band. The same topology applied for the UHF1/7/800,
UHF2/7/800, UHF1/VHF, UHF1/UHF2 and UHF2/VHF radio where two LDMOS high power
transistors are used to cover each band. This is depicted by
on page 3-17. The high power transistor is driven by an RF driver IC that receives its input signal
from the voltage controlled oscillator. Transmitter power is controlled by a discrete power control
circuit that senses the output of a directional coupler and adjusts PA control voltage to maintain the
correct power level. The TX signals pass through their respective harmonic filters, a TX/RX switch,
and embedded directional coupler, a RF switch and then the antenna.
Table 8-1, "Transceiver Schematics and Board Overlays," on page 8-1
(Figure 3-15 on page 3-15) consists of two LDMOS high power transistors, one for
Theory of Operation: Transceiver Board
Figure 3-16 on page 3-15
for a listing of
to Figure 3-20