Motorola APX 7000 Detailed Service Manual page 67

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Theory of Operation
: Controller
3.2.4.3 Asynchronous External Memory Interface
The EMIFS is used for transferring data between the ARM or DSP cores and the 64 MB External
NOR Flash memory (U6304). The Flash memory is a non-volatile memory unit, primarily used to
store the radio's executable code, along with device configuration values, event logs, and
initialization codes. The Flash memory is accessed during VOCON power up and power down.
3.2.4.4 Flash Memory (U6304)
The Flash memory located in close proximity to the OMAP processor is a 64 MB Intel StrataFlash.
The flash interface uses 16 data bits and 25 address bits. The flash IC is enabled by OMAP
processor's CS3 line. The flash IC also features a WAIT line that is capable of halting data flow
between the processor and flash IC.
3.2.4.5 CPLD
The CPLD (U6101) registers are also mapped to the Asynchronous External Memory Interface.
These registers control the CPLD GPIO pins and enable the OMAP to expand its GPIO capability via
memory mapped IO.
3.2.4.6 Synchronous External Memory Interface
This interfaces the OMAP to a 32 MB Double Data Rate (DDR) RAM IC (U6301). Upon boot-up
OMAP configures this interface to operate in synchronous mode at 96 MHz. This volatile memory
unit is accessed during code execution.
DDR_CTRL_10:0
SADD_15:0
SDATA_15:0
SDCLK
SDCLKX
FADD_25:1
FDATA_15:0
NF_CS3
NF_RP
NF_WE
NF_WP
FCLK
FRDY
NF_ADV
NF_OE
NF_CS1
Figure 3-32. OMAP Memory Interface
DDR_CTRL_10:0
A13:0
DQ15:0
CK
CK#
A24:0
DQ15:0
EN_CE
EN_RST
EN_WE
EN_WP
CLK
WAIT
ADV
EN_WE
Wait
ADDR_4:0
Switch
DATA_4:0
CPLD_ADV
CPLD_R/W
CPLD_CS
WAIT_SW_EN
3-43

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