Motorola EVB555 Quick Reference page 33

Pin MPC pin Signal name
49 V5 Addr_SGP9
50 V6 Addr_SGP8
51 V3 Addr_SGP11
52 V4 Addr_SGP10
53 Y2 Addr_SGP13
54 W1 Addr_SGP12
55 Y3 Addr_SGP15
56 W3 Addr_SGP14
59 Y4 Addr_SGP17
60 W4 Addr_SGP16
61 Y5 Addr_SGP19
62 W5 Addr_SGP18
63 Y6 Addr_SGP21
64 W6 Addr_SGP20
65 W7 Addr_SGP23
66 V7 Addr_SGP22
67 Y8 Addr_SGP25
68 Y7 Addr_SGP24
69 V8 Addr_SGP27
70 W8 Addr_SGP26
71 U9 Addr_SGP29
72 U8 Addr_SGP28
73 U6 Addr_SGP31
74 U7 Addr_SGP30
77 U2 /TAB
78 T2 /TEAB
80 N1 /WEB_AT[0]
81 R1 RD_/WRB
82 P1 /WEB_AT[1]
84 P2 /WEB_AT[2]
85 P4 /CS0B
86 P3 /WEB_AT[3]
87 R4 /CS1B
88 T1 /OEB
89 R3 /CS2B
91 R2 /CS3B
95 V18 CLKOUT
15, 16,
27, 28,
39, 40,
57, 58, GND
75, 76,
83, 93,
96 ,97
EVB555
Quick Reference
Description corresponding to the data sheet
Addr_SGP8 - Addr_SGP31:
24 address lines,
16 MB address space
Transfer acknowledge: transfer accepted/valid
Transfer error acknowledge: error occurred in the current transaction
Write enable: /WE0 is asserted if the data lane DATA[0:7]
contains valid data.
Read/write : "1" → read, "0" → write
Write enable: /WE1 is asserted if the data lane DATA[8:15]
contains valid data.
Write enable: /WE2 is asserted if the data lane DATA[16:23]
contains valid data.
Chip select: /CS0 can be the global chip select for the boot device.
Write enable: /WE3 is asserted if the data lane DATA[24:31]
contains valid data.
Chip select
Output enable
Chip select
Chip select
Clock out: can be configured to full strength, half strength or disabled.
Ground
MOTOROLA
A-35