Table of Contents
Advertisement
133
8.4.
DISPLAY INTERFACE
CIRCUITS
SAA1060 LED DISPLAY/INTERFACE CIRCUIT
DUP
LOEX
data
DLEN
CLB
Block diagram
GENERAL
DESCRIPTION
Data
transmission
is
initiated
by means
of
a
burst of clock
pulses
(CLB),
a
data
line
enable
signal
(DLEN)
and
the data
signal
(DATA). The
bus
control
circuit
distinguishes
between
interference
and
valid
data
by
checking
word
iength (17
bits)
and
the
leading
zero.
This allows
different
bus information
to
be supplied
on
the
same
bus
lines
for
other
circuits
(e.g.
SAA1056
with 16
bits).
The
last
bit
(bit
17) of the data
word
contains the information
which
of the
two
internal
latches
will
be
loaded.
The
input
LOEX
determines
if
the latched data of the
selected latches
is
presented
directly
to
the outputs,
or
synchronized with
the data
select signal
DUP.
The
output
stages are n-p-n transistors
with
open
collectors.
The
current capability
is
designed
for
the
require-
ments
of
duplex
operation.
Two
of the outputs
(Qg and
Q']
0
)
ere
arranged
for
double
current,
so that
2 x
2 segments
can be
connected
in parallel.
Hide quick links:
Advertisement
Table of Contents
