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55
ROMs
The two
ROMs
are
each addressed
by
the
eight address
lines
AO
to
A7
and
three of the
program
control
lines
P20, P21, P22.
When
addressed, the
ROM
responds
by
sending the
instruction or
data
in
the
location
addressed
on
the
eight
lines
of the databus.
This data
output
function
is
controlled
by
the
PSEN
(program
store
enable)
signal (pin 9)
sent
by
the
^xP.
This
is
applied to
NAND-gate
D1
921, wired
as
an
inverter
and
gives a logic
"1" on NAND-gate
inputs
D1921-12
and D1921-5.
Signal
P23
is
a
chip
select
input
via
inverter
D1
921,
which
is
used to
select
either
D1909
or
D1920
via
input
pin 20.
-lOV
-5V
Fig.
39.
Memory
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