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SONY
CXD1355AC
Explanation
of Instruction
A
single
instruction
word
is
8-bit
length
can handle
parallel
execution
the following
live
instructions.
1
.
Multiplication instruction
Depending on
the
setting
of
the
multiplicand select
bits
(10, 11),
either
R1
,
ADL,
ADR
or
ACC
*
is
used as
the
16-bit multiplicand.
This
is
multiple
by
the
multiplication coefficient
K
and
the
product
is
latched
to P.
The
resultant
product
P
is
used
in
the next
addition instruction step.
Equations such as
(-1
)
x
(-1
)
-» +
1
will
be
calculated
correctly.
*
Note
that
Ace
contains
16-bit
data
resulting
from overflow
processing.
11
90
MPY
ADRxK
1
AccX K
1
ADLxK
1
1
R1
X K
2.
Addition
instruction
Depending on
the
setting
of
the
augend
select
bits
(14, IS),
either
Ace
(22),
R2,
DAL
or
zero value
is
used as
the
augend.
The
multiplication result
P
from
the
previous step
is
added
to this
and
the addition
result
is
latched
to
Ace
(22).
15
!4
Adder
0+P
1
R2+P
1
Acc+P
1
1
DAL+P
3.
Data
I/O instruction
During a read cycle
(17
=
"H"),
input
data
is
latched
to
R1. During a
write
cycle
(17
=
"L").
either
Ace
or
DAR
are
selected,
depending on
the
setting of
12
and
13,
and
the
data
is
output.
During
write cycles,
data
in
R1 does
not
change.
17
13
12
DRAM
DATA
1
1
X
WRITE
DAR
->
DRAM
Ace-*
DRAM
Ace
-»
DRAM
1
X
X
READ
DRAM^RI
Ace
transfer instruction
Depending on
the
setting of
the
Ace
transfer
bits
(12, 13),
Ace
can
transfer
to
either
DAL
or
DAR.
I3I2
Ace
transfer
Ace
-»
DAL
Ac
c^-
DAR
R1
transfer instruction
Depending on
the
setting
of
the
register transfer
bit (16),
R1
data
transfer
to
R2
is
selected.
16
=
"H":
R2
value
remains unchanged.
IB
1
R1
transfer
R1—R2
-
174-
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