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SONY
CXD2552G
Description of Function
I/O
Synchronizing
Circuit
1)
Theory
of
operation
A
window
featuring
8
internal
clocks (256Fs)
is
set.
The
sync
circuit
observes whether
the
rising
edge
(LRCK
J")
of
the
LRCK
input
has
entered
the
window
or
not.
When
power
supply
is
turned
on,
should
LRCK
J~
be
out
of
the
window,
the
sync
circuit
stops
the
internal
processing
in
timing with
the center
of
the
window.
The
processing
is
started
synchronously
with
the
appearance
of
the next
LRCK
J~
.
Synchronization
between
the
exterior
system and
this
LSI
is
established
through
this
operation.
2)
Resynchronization by
means
of INIT
Even when
LRCK
X
is
inside
the
window
but located
close
to
one
of
the
two
edges
of
the
window,
synchronization
may
be
upset by
the mingling
of
external noise.
To
this effect,
it
is
necessary
to
apply resync
without
fail
after
power
supply
is
turned on.
Resync
operation
is
executed from
the
rising
edge
of
INIT
and
timed
after
4
periods
of
Fs
rate
LRCK, The
sync
circuit
is
initialized
and
LRCK
J"
is
located
at
the
center
of
the
window.
Moreover,
when
synchronization
falls
out
of
the
window,
INAF
output turns
to
"H"
level.
INIT input
l.i:e-n»
INIT
01
NIT
output
Here
resynchronization
is
applied-
4
periods
of
Fs
rate
LHCK
Input
Timing
(Bfs rate)
LRCK
I
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