Details Of I/O Signals - Mitsubishi Electric MELSEC Q Series User Manual

3 SPECIFICATIONS

3.3.2 Details of I/O signals

Device No. Signal name
X0 Module ready
X8 Monitor start flag
Operating
X9 condition setting
completed flag
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I/O signals for the Q62DA-FG are explained in detail below.
(1) Input signals
(1) When the programmable controller CPU is powered on or reset, this signal turns on
once the preparation for D/A conversion has been completed, and D/A conversion
processing is then performed.
(2) When Module ready (X0) signal is off, D/A conversion processing is not performed.
Module ready (X0) turns off in the following situations:
• During offset/gain setting mode
• When the Q62DA-FG has a watchdog timer error
(1) The monitor start flag turns on at the A/D conversion completion of the analog
output value and the converted value is stored to CH
(buffer memory address 38, 39: Un\G38, Un\G39).
(2) Monitor start flag (X8) turns off when Operating condition setting request (Y9) turns
on.
(1) This is used as an interlock condition for turning on/off Operating condition setting
request (Y9) when any of the following settings is changed.
• D/A conversion enable/disable setting (buffer memory address 0: Un\G0)
• Rate control enable/disable setting (buffer memory address 46: Un\G46)
• Disconnection detection/Warning output setting (buffer memory address 47:
Un\G47)
• CH Increase/Decrease digital limit value (buffer memory address 70 to 73:
Un\G70 to 73)
• Disconnection detection mode setting (buffer memory address 141: Un\G141)
• CH Disconnection detection setting value (buffer memory address 142,143:
Un\G142, Un\G143)
(2) Under the following conditions, Operating condition setting completed flag (X9)
turns off.
• When Operating condition setting request (Y9) is on
Module ready (X0)
Operating condition
setting completed flag (X9)
Operating condition
setting request (Y9)
Description
Output monitor value
Performed by the Q62DA-FG
Performed by the sequence program
MELSEC-Q
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