Block Diagram Of The Dsp56F803Evm - Motorola DSP56F803 Hardware User Manual

hardware products based on the DSP56F803. The DSP56F803EVM provides the features
necessary for a user to write and debug software, demonstrate the functionality of that
software and interface with the customer's application-specific device(s). The
DSP56F803EVM is flexible enough to allow a user to fully exploit the DSP56F803's
features to optimize the performance of their product, as shown in
RESET
LOGIC
MODE/IRQ
LOGIC
Program Memory
64Kx16-bit
Data Memory
64Kx16-bit
Memory
Expansion
Connector(s)
JTAG
Connector
Parallel
DSub
JTAG
25-Pin
Interface
Figure 1-1. Block Diagram of the DSP56F803EVM
1-2
DSP56F803
XTAL/EXTAL
RESET
MODE/IRQ SCI
Address,
Data &
Control
SPI
CAN
TIMER
GPIO
PWM
JTAG/OnCE
A/D
3.3 V & GND
DSP56F803EVM Hardware User's Manual
Figure 1-1.
Low Freq
Crystal
RS-232
DSub
Interface
9-Pin
CAN Interface
Debug LEDs
Peripheral
Expansion
PWM LEDs
Connector(s)
Over V Sense
Over I Sense
Zero Crossing
Detect
UNI-3
Power Supply
3.3V, 5V & 3.3VA