Sa[15:0] Latch; Number Of Isa Slots; Pull-Up Resistance Of Iochrdy - Epson SCE8720C Series Hardware Manual

A.2.3 SA[15:0] latch
Since SA[15:0] are multiplexed by SD/SA[15:0] to be output, they must be externally
latched by SALATCH signal. Circuit example is shown below.
SD/SA[15:0]
SALATCH
A.2.4 Number of ISA slots
2 slots are assumed. However, condition varies depending on the type of load (CMOS,
TTL, LSTTL) and wiring length. Therefore, design must be done by calculating the load,
wiring length, fine-in and fine-out (refer to 6.3).
A.2.5 Pull-up resistance of IOCHRDY
Since IOCHRDY sample timing is fixed, devices on the ISA must change the signal
within the fixed timing. This signal might be delayed due to increased load capacity, so
externally add a pull-up resistance when load is heavy. Of course, this resistance must
be within the range that can be driven by the device on the ISA.
Rev.A
Oc
D0-7
Q0-7
Gate
Oc
D0-7
Q0-7
Gate
Figure A.5 Latch method of SA0-15 signals
EPSON
CARD-PCI/GX Hardware Manual
SA[7:0]
SA[15:8]
(Eg. HCT373 *2)
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