Hitachi 61HDX98B Manual page 50

DP-85 CHASSIS MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT DIAGRAM
IOO1
Micro Processor
SCL2 45
SDA2
42
NOTE:
J22600 Lum type connector
Pins on the DM-1 are
backwards compared to
PMS2
PMS2.
ICP TX 17
ICP REQUEST 19
21
ICP RX
23
ICPCLK
SDA3
15
SCL3 13
GEQ CLOCK 54
GEQ DATA 48
PinP Tuner Enable 39
PinP Tuner Data 38
PinP Tuner Clock 37
SCL1 43
SDA1 47
U002
2 PinP
SDA2
UNIT
1
SCL2
PCX
3
SCL2 3D Y/C
UNIT
2
SDA2
5 10
3 12
DM-1
MODULE
6 9
4 11
5
SDA3
IOO2
EEPROM
6
SCL3
17 Enable
U001
Tuner 2
16 Data
(Mono)
Pinp
15 Clock
I008
1H Video/
Chroma
34 33
PSD1
SDA2
SCL2
1
2
PSZ1
17 26
SCL2
16 27
SDA2
PSU1
4
5
12
13
6 27
SCL1
7 26
SDA1
Sub Deflection PWB
I702
Sweep Control
PDD2
4
9 SCL2
3
8 SDA2
2H Video PWB
Surround PWB
16
IX01
Center/LFE
17
Rainforest Audio Control
16
Rear/Headphone
SCL2
17
Audio Control
SDA2
GEQ CLOCK
16
GEQ DATA
17
IS01
16
Front/Transmit
Audio Control
17
Terminal PWB
I301
PST3
A/V Select
5 27
SCL1
4 26
SDA1
IS02
IS03
IG02
Front
Equalizer
IG11
Center
Equalizer