Philips 32PFS5709/12 Service Manual page 71

TDSY-G380D
I 2 C
IF_AGC
RF_AGC
Figure 7-8 Front-End DVB-T2 DTV block diagram
SUT-RE231ZN
I 2 C
IF_AGC
RF_AGC
Figure 7-9 Front-End DVB-T2 DTV block diagram[1]
7.5 Front-End Analogue and DVB-S2 reception
7.5.1 Front-END DVB-S2 part
The Front-End for DVB-S2 application consist of the following
key components:
• TUNER EUROPE SUT-ZE221ZN for K series (DVB-S2)
• DEMODULATOR CXD2839ER VQFN-48 for (K model) S2
Demond
• DEMODULATOR CXD2842ER VQFN-48 for (S model) S2
Demond
• SCALER MT5591IVDJ HSBGA-758 TV Processor
Below find a block diagram of the front-end application for
DVB-S2 part.
S2 function
S2 tuner LNB power
Tuner I2C
S2 Demond
CDX2839ER
IP/IN/OP/ON
Tuner I2C
Figure 7-10 Front-End DVB-S2 block diagram
I 2 C
IF
T2 demod
CDX2842ER
I 2 C
MT5591
19610_205.eps
I 2 C
IF
T2 demod
CDX2842ER
2
I C
MT5591
19617_202.eps
MT5591
MCU ARM
System I2C
MPEG/vedio/audio
decoder
Scaling
Vedio enhancement
3D comb
HDMI 1.4
H 264
TS DATA
19610_206.eps
Circuit Descriptions
S2 function
S2 tuner
Tuner I2C
IP/IN/OP/ON
Figure 7-11 Front-End DVB-S2 block diagram
This application supports the following protocols:
• Polarization selection via supply voltage (18V=horizontal,
13V=vertical)
• Band selection via "toneburst" (22kHz): tone "on"= "high"
band tone "off" = "low" band
• Satellite (LNB) selection via DiSEqC 1.0 protocol
• Reception of DVB-S (supporting QPSK encoded signals)
and DVB-S2 (supporting QPSK, 8PSK, 16APSK and
32APSK encoded signals), introducing LDPC low-density
parity check techniques.
7.6 HDMI
Refer to figure
application.
MTK5591
I2C
BRX
CN501
HDMI1
Figure 7-12 HDMI input configuration
The following HDMI connector can be used:
• HDMI 1: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input/ARC
• HDMI 2: HDMI input (TV digital interface support HDCP)
with digital audio / PC DVI input
• HDMI input (TV digital interface support HDCP) with digital
audio / PC DVI input
• +5V detection mechanism
• Stable clock detection mechanism
• Integrated EDID
• HPD control
• Sync detection
• TMDS output control
• CEC control
7.7 Video and Audio Processing - MT5591IVDJ
The MT5591IVDJ is the main audio and video processor (or
System-on-Chip) for this platform. It has the following features:
back to
div. table
TPM14.2E LA 7.
System I2C
MPEG/vedio/audio
LNB power
decoder
Vedio enhancement
S2 Demond
3D comb
CDX2842ER
Tuner I2C
TS DATA
7-12 HDMI input configuration
I2C
RX
I2C
RX
CN502 CN503
HDMI2
HDMI SIDE
EN 71
MT5591
MCU ARM
Scaling
HDMI 1.4
H 264
19617_203.eps
for the
I2C
RX
U504
HDMI SIDE
19610_207.eps
2014-Sep-26