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S1D15710 Series Technical Manual Rev.1.1c...
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Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.
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Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind aristing out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.
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Configuration of product number DEVICES 15710 D 00B0 00 Packing specification Specifications Shape (D:Chip, T:TCP, F:QFP) Model number Model name (D:LCD Driver) Product classification (S1:Semiconductors)
. There are no methods for supplying liquid crystal drive power externally without using the built-in power circuit. In that case, select either the S1D15710D00B or the S1D15710D11B *2: All specificationa are same as those of the S1D15710D00B except for the temperature sensor circuit. EPSON S1D15710 Series (Rev. 1.1c)
PAD No.152 × µm PAD No.153 × µm PAD No.154 to 381 × µm PAD No.382 × µm PAD No.383 × µm PAD No.384 to 416 × µm PAD No.417 µm Bump height 17 (Typ.) EPSON S1D15710 Series (Rev. 1.1c)
Voltage adjusting pin. Applies voltage between V and V using a split resistor. Valid only when the V voltage adjusting built-in resistor is not used (IRS=LOW) Do not use VR when the V voltage adjusting built-in resistor is used (IRS=HIGH) EPSON S1D15710 Series (Rev. 1.1c)
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When P/S=LOW, D0 to D5 are set to high impedance. D0 to D5 can be HIGH, LOW, or “OPEN”. RD(E) and WR (R/W) are fixed to HIGH or LOW. For the serial data entry, RAM display data cannot be read. EPSON S1D15710 Series (Rev. 1.1c)
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Power supply control pin of the power supply circuit for liquid crystal drive HPM=HIGH: Normal mode HPM=LOW: High power supply mode Valid only at master operation. The pin is fixed to HIGH or LOW at slave operation. EPSON S1D15710 Series (Rev. 1.1c)
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IC chip test pin. Fix the pin to HIGH. TEST5 to 9, IC chip test pin. Take into consideration so that the capacity of 14 to 16 lines cannot be exhausted by setting the pin to OPEN. EPSON S1D15710 Series (Rev. 1.1c)
In addition, the data bus signal can be identified according to the combinations of the A0, RD (E), WR (R/W) signals as listed in Table 3. Table 3 Common 68 series 80 series Function Display data read Display data write Status read Control data write (command) EPSON S1D15710 Series (Rev. 1.1c)
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For example, when data is written on the display data checked before each command. RAM, the data is first held in the bus holder and written EPSON S1D15710 Series (Rev. 1.1c)
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6. FUNCTION DESCRIPTION • Write DATA Latch BUS Holder Write Signal • Read DATA Address Preset Read Signal Column Address Preset N Increment N+1 Bus Holder Address Set Dummy Data Read Data Read Read #n+1 Figure 2 EPSON S1D15710 Series (Rev. 1.1c)
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0 to the column of page 1, for example, it is Dynamically changing the line address using the display necessary to specify each of the page address and start line address set command enables screen scrolling column address again. and page change. EPSON S1D15710 Series (Rev. 1.1c)
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COM50 COM51 Page 6 COM52 COM53 COM54 COM55 COM56 COM57 COM58 COM59 Page 7 COM60 COM61 COM62 COM63 Page 8 COMS The 65th line is accessed independently of the display start line address. Figure 4 EPSON S1D15710 Series (Rev. 1.1c)
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COM scanning signal, and FR signal. Table 6 Figure 6 shows examples of the SEG and COM output waveforms. State COM scanning direction → Normal rotation COM 0 COM 63 → Reversal COM 63 COM 0 EPSON S1D15710 Series (Rev. 1.1c)
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CAP1+↔ and CAP3–, and between V CAP2+ to OPEN, and V and strapping CAP2–, and V CAP3–, and V pins. ↔ V For the triple boosting, the V potential is Figure 8 shows the relationships of boosting potential. EPSON S1D15710 Series (Rev. 1.1c)
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Expression A-1 within the range of |V |<|V save parts. ⋅ (Expression A-1) α ⋅ ⋅ – α Θ − ⋅ EPSON S1D15710 Series (Rev. 1.1c)
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Ra and Rb. Figure 10 show the V voltage reference values per temperature gradient device based on the values of the voltage adjusting built-in resistance ratio register and electronic control register at Ta=25°C. EPSON S1D15710 Series (Rev. 1.1c)
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In this case, Table 13 lists the V voltage variable range and pitch width using the electronic control function. Table 13 Min. Typ. Max. Unit Variable range –11.6 –9.3 –7.1 Pitch width [mV] EPSON S1D15710 Series (Rev. 1.1c)
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⋅ ⋅ – + ∆ display can be adjusted by using the electronic control function. α Θ − ⋅ (Expression C-1) EPSON S1D15710 Series (Rev. 1.1c)
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The power supply circuit incorporated in the S1D15710 converted by the voltage follower and supplied to the series has the ultra-low power consumption (normal liquid crystal drive circuit. mode: HPM=HIGH). Therefore the display quality EPSON S1D15710 Series (Rev. 1.1c)
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(2) When not using the V voltage adjusting built-in resistor (Example of V , quadruple boosting) (Example of V , quadruple boosting) CAP3– CAP3– CAP1+ CAP1+ CAP1– CAP1– CAP2+ CAP2+ CAP2– CAP2– EPSON S1D15710 Series (Rev. 1.1c)
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CAP1– Power CAP2+ CAP2+ Supply CAP2– CAP2– External Power Supply Common reference setting example At V =–8 to –12 V variable Item Setting value Unit µF 1.0 to 4.7 µF 0.01 to 1.0 Figure 14 EPSON S1D15710 Series (Rev. 1.1c)
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Meanwhile, because of the existence of these capacitors (the capacitors connecting to respective reinforcing resistors, current consumption will CAP pins and capacitor being inserted between increase. and V ) of this IC are being switched over EPSON S1D15710 Series (Rev. 1.1c)
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Register: (D2,D1,D0)=(0,0,0) 18. Electronic Control Register Set Mode Reset Electronic Control Register* (D5, D4, D3, D2, D1, D0) = (1,0,0,0,0,0) 19. n-Line Alternating Current Reversal Register: (D3, D2, D1, D0) = (0, 0, 0, 0) EPSON S1D15710 Series (Rev. 1.1c)
For details, see the Line address circuit of “Function Description”. E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 Line address ↓ ↓ EPSON S1D15710 Series (Rev. 1.1c)
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After the display data is written and read, the column address is incremented by 1 according to the column address of Figure 4. For details, see the Column address circuit of “Function Description”. E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 Setting Clockwise (normal rotation) Counterclockwise (reversal) EPSON S1D15710 Series (Rev. 1.1c)
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A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 * The commands other than Display Data Read/Write can be used even in Read Modify Write mode. However, the column address set command cannot be used. EPSON S1D15710 Series (Rev. 1.1c)
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A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 The initialization when the power is applied is performed using the reset signal to the RES pin. The reset command cannot be substituted for the signal. EPSON S1D15710 Series (Rev. 1.1c)
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This state is reset after data is set in the register using the electronic control register set command. E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 EPSON S1D15710 Series (Rev. 1.1c)
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ON command is entered, the commands other than the static indicator register set command cannot be used. This state is reset after the data is set in the register using the static indicator register set command. E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 Static indicator EPSON S1D15710 Series (Rev. 1.1c)
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MPU. The internal state in the sleep state is as follows: (1) The oscillator circuit and the LCD power supply circuit are stopped. (2) All liquid crystal drive circuit is stopped and the segment and common drivers output the V level. EPSON S1D15710 Series (Rev. 1.1c)
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This command starts the operation of the built-in CR oscillator circuit. This command is valid only for the master operation (M/S=HIGH) and built-in oscillator circuit valid (CLS=HIGH). E R/W A0 RD WR D7 D6 D5 D4 D3 D2 D1 D0 EPSON S1D15710 Series (Rev. 1.1c)
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Such action that suppresses the generation of noise and prevents the effect of noise needs to be taken on installation and systems. Besides, to prevent sudden noise, it is recommended that the operating state should periodically be refreshed. EPSON S1D15710 Series (Rev. 1.1c)
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Resets the line reversal drive. (24) Built-in Oscillator Starts the operation of the built-in Circuit ON CR oscillator circuit. (25) NOP Non-Operation command (26) Test Do not use the IC chip test command. *: Invalid bit EPSON S1D15710 Series (Rev. 1.1c)
Voltage Adjusting Built-in Resistance ratio Set” *9: 6. Function Description Section “Power Supply Circuit” and 7. Command Description Item (18) “Electronic Control” *10: 6. Function Description Section “Power Supply Circuit” and 7. Command Description Item (16) “Power Control Set” EPSON S1D15710 Series (Rev. 1.1c)
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Set all commands again. Write in the display data RAM again. Notes: Reference items *16: It is recommended that the operating modes and display contents be refreshed periodically to prevent the effect of unexpected noise. EPSON S1D15710 Series (Rev. 1.1c)
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1 volt depends on capacitor C2 to be connected between – V and V . Figure 5 shows the reference values. Capacity C2 [µF] Figure 20 Set up so that the relationship, > , is maintained. A state of < may cause faulty display. EPSON S1D15710 Series (Rev. 1.1c)
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If command control is disabled when power is OFF, take action so that the relationship, > , is maintained by measures such as making the trailing characteristic of power (V – V ) longer. Figure 22 EPSON S1D15710 Series (Rev. 1.1c)
Besides, it is desirable that the LSI should be used in the electrical characteristics condition for normal operation. If this condition is exceeded, the LSI may malfunction and have an adverse effect on the reliability of the LSI. EPSON S1D15710 Series (Rev. 1.1c)
— — Voltage adjusting circuit (Based on V –20.0 — –6.0 operating voltage V/F circuit operating (Based on V –18.0 — –4.5 voltage Reference voltage Ta=25°C, –0.05%/°C –2.04 –2.10 –2.16 REG0 [*: see Page 49.] EPSON S1D15710 Series (Rev. 1.1c)
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Current consumption at power save V =0 V and V Table 24 Ta=25°C Specification value Item Symbol Condition Unit Remarks Min. Typ. Max. µA Sleep state — 0.01 DDS1 Stand-by state — DDS2 [*: see Page 49.] EPSON S1D15710 Series (Rev. 1.1c)
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– V = –11.0 V S1D15710D00B /D11B Normal mode Display checker Display pattern: All white/ checker S1D15710D10B Display all white Ta = 25°C S1D15710D00B /D11B Remarks: *12 Display all white [*: see page 49.] Figure 25 EPSON S1D15710 Series (Rev. 1.1c)
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Ta = 25°C 0.01 0.001 0.01 [MHz] Figure 26 [Reference data 4] and V system operating voltage –20 S1D15710 Series ranges –18 Remarks: *2 –15 –10 Operation Area –7.2 –5 –4.5 Figure 27 [*: see page 49.] EPSON S1D15710 Series (Rev. 1.1c)
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*11 and *12 Indicate the current dissipated by a single IC at built-in oscillator circuit used, 1/9 bias, and display Does not include the current due to the LCD panel capacity and wireing capacity. Applicable only when there is no access from the MPU. *12 When the V voltage adjusting built-in resistor is used EPSON S1D15710 Series (Rev. 1.1c)
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CCLR Control HIGH pulse width (Write) — CCHW Control HIGH pulse width (Read) — CCHR Data setup time D0 to D7 — Data hold time — RD access time =100pF — ACC8 Output disable time EPSON S1D15710 Series (Rev. 1.1c)
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All timings are specified based on the 20 and 80% of V are specified for the overlap period when CS1 is at LOW (CS2= HIGH) level and WR, RD are CCLW CCLR at the LOW level. EPSON S1D15710 Series (Rev. 1.1c)
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D0 to D7 — Data hold time — Access time =100pF — ACC6 Output disable time Enable HIGH pulse Read — EWHR width Write — EWHW Enable LOW pulse Read — EWLR width Write — EWLW EPSON S1D15710 Series (Rev. 1.1c)
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All timings are specified based on the 20 and 80% of V are specified for the overlap period when CS1 is at LOW (CS2 = HIGH) level and E is at the EWLW EWLR HIGH level. EPSON S1D15710 Series (Rev. 1.1c)
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Serial clock cycle — SCYC SCL HIGH pulse width — SCL LOW pulse width — Address setup time — Address hold time — Data setup time — Data hold time — CS-SCL time — — EPSON S1D15710 Series (Rev. 1.1c)
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*3 Pay attention not to cause delays of the timing signals CL, FR and SYNC to the salve side by wiring resistance, etc., while master/slave operations are in progress. If these delays occur, indication failures such as flickering may occur. EPSON S1D15710 Series (Rev. 1.1c)
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=1.8V to 2.7V, Ta=–40 to +85°C] Specification value Item Signal Symbol Condition Min. Typ. Max. Unit µs Reset time — — Reset LOW pulse width — — All timings are specified based on the 20 and 80% of V EPSON S1D15710 Series (Rev. 1.1c)
D0 to D7 RESET Figure 33-1 68 series MPU A1 to A15 Decoder D0 to D7 D0 to D7 RESET Figure 33-2 Serial interface or V A1 to A7 Decoder Port 1 Port 2 RESET Figure 33-3 EPSON S1D15710 Series (Rev. 1.1c)
The S1D15710 series is used for the multiple chip configuration to easily expand the liquid crystal display area. Use the same device (S1D15710 /S1D15710 ) for the master/slave. ***** ***** S1D15710 (master) ↔ S1D15710 (slave) SYNC SYNC Output Input Figure 34 EPSON S1D15710 Series (Rev. 1.1c)
CAP3- • CAP1+ CAP1- • CAP2- SEG 1 CAP2+ SEG 0 COM S COM 0 • • • • • COM 30 COM 31 Note) This TCP pin layout does not specify the TCP dimensions. EPSON S1D15710 Series (Rev. 1.1c)
–2.28 SEN1 standard) Ta=85°C –2.92 –2.20 –1.47 Output voltage 11.4 13.4 mV/°C SEN1 temperature gradient ∆VL Output voltage –1.5 – SEN1 linearity Output voltage – – SEN1 setup time µA Operating current Ta=25°C – SVS1 EPSON S1D15710 Series (Rev. 1.1c)
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*3: Waiting time until monitoring is enabled with stable output voltage after applying power voltage SVS to terminal SVS1. The output voltage needs to be sampled after a longer than standard waiting time. Output voltage characteristics –1 Min. –2 Typ. Max. –3 –4 –5 –50 –25 Temperature Ta[°C] EPSON S1D15710 Series (Rev. 1.1c)
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Load capacity CL of V output terminal V should be under 100pF and load resistance RL higher than 1MΩ. SEN1 Be careful not to build a current path between V in order to obtain an accurate output voltage value. EPSON S1D15710 Series (Rev. 1.1c)
IC and external input / output pins may influence the display quality. (1) The resistance of ITO wire connected to external capacitor must be as low as possible. (2) The resistance of ITO wire connected to power source must be as low as possible. EPSON S1D15710 Series (Rev. 1.1c)
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301 Edgewater Place, Suite 210 Telex: 65542 EPSCO HX Wakefield, MA 01880, U.S.A. Phone: +1-800-922-7667 FAX: +1-781-246-5443 EPSON TAIWAN TECHNOLOGY & TRADING LTD. 14F, No. 7, Song Ren Road, Southeast Taipei 110 3010 Royal Blvd. South, Suite 170 Phone: +886-2-8786-6688 FAX: +886-2-8786-6677 Alpharetta, GA 30005, U.S.A.