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HPC-ADSC/HPC-RPSC
COM HPC Client
st
User's Manual 1
Ed
Last Updated: April 19, 2023

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Table of Contents
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Summary of Contents for Asus AAEON HPC-ADSC

  • Page 1 HPC-ADSC/HPC-RPSC COM HPC Client User’s Manual 1 Last Updated: April 19, 2023...
  • Page 2 Copyright Notice This document is copyrighted, 2023. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgements All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp. ⚫ Intel® is a registered trademark of Intel Corporation ⚫ Intel Core™ is a trademark of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity HPC-ADSC/HPC-RPSC ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately. Preface...
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ 连接器及线材 O:表示该有毒有害物质在该部件所有均质材料中的含量均在 SJ/T 11363-2006 标准规定的限量要求以下。 X:表示该有毒有害物质至少在该部件的某一均质材料中的含量超出...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Block Diagram ......................4 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................8 List of Connectors ....................9 2.3.1 Row A/B/C/D Connector (J1) ..............9 2.3.2 Row E/F/G/H Connector (J2) ..............14 2.3.3...
  • Page 12 3.4.6 On-Module Configuration ............... 38 3.4.7 Power Management .................. 39 3.4.8 AAEON BIOS Robot .................. 40 3.4.9 AAEON Smart Boost ................. 42 Setup Submenu: System I/O ................46 3.5.1 PCI Express Configuration................ 47 3.5.2 Storage Configuration ................60 3.5.3 VMD Setup Menu ..................61 3.5.4 NMVe Configuration .................
  • Page 13 Appendix A - I/O Information ....................80 I/O Address Map ....................81 Memory Address Map ..................82 Large Memory Address Map ................83 IRQ Mapping Chart ....................84 Preface XIII...
  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 15: Specifications

    Specifications System Form Factor COM-HPC R1.0 Client Size C Gen Intel® Core™ Processors (LGA1700, formerly Alder Lake-S/Raptor Lake-S) CPU Frequency Up to 2.30 GHz, 16 Core, i9-12900E Chipset Intel® R680E Memory Type DDR5 4800MHz SODIMM Socket x 2 Max. Memory Capacity Up to 64GB (ECC) BIOS AMI BIOS (UEFI)
  • Page 16 Ethernet 2.5GbE x 2 (Intel® I226-LM) Audio — USB Port USB 3.2 x 4 (Type-C, 20Gbps x 2, 10Gbps x 2) USB 3.2 x 2 (Type-A, 10Gbps) USB 2.0 x 8 Serial Port 4-Wire UART x 2 HDD Interface SATA III x 2 Expansion Slot M.2 2280 M-Key PEG [x16] x 1, split to PEG [x8] x 2 by BOM...
  • Page 17: Block Diagram

    Block Diagram Chapter 1 – Product Specifications...
  • Page 18: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 19: Dimensions

    Dimensions Chapter 2 – Hardware Information...
  • Page 20 With Active Cooler (P/N HPC-RPSC-FAN01) Chapter 2 – Hardware Information...
  • Page 21: Jumpers And Connectors

    Jumpers and Connectors Component Side Solder Side Chapter 2 – Hardware Information...
  • Page 22: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function Row A/B/C/D Row E/F/G/H LPC1 JRTC1 Battery M.2 2280 M-Key 2.3.1 Row A/B/C/D Connector (J1) Client Row A Row B Row C Row D...
  • Page 23 Client Row A Row B Row C Row D USB7+ USB3+ USB4- USB0- USB6- USB4+ USB2- USB0+ USB6+ USB2+ I2S_LRCLK/SNDW_ DDI0_SDA_AUX- CLK3/HDA_SYNC I2S_DOUT/SNDW_ SNDW_ DDI1_SDA_AUX- DDI0_SCL_AUX+ DAT3/HDA_SDO DMIC_CLK1 I2S_MCLK/HDA_R SNDW_DMIC_DAT DDI1_SCL_AUX+ I2S_DIN/SNDW_D DDI0_PAIR0- AT2/HDA_SDI I2S_CLK/SNDW_C SNDW_DMIC_CLK DDI1_PAIR0- DDI0_PAIR0+ LK2/HDA_BCLK SNDW_DMIC_DAT DDI1_PAIR0+ VCC_5V_SBY USB67_OC#...
  • Page 24 Client Row A Row B Row C Row D eDP_TX0+ USB1_LSTX USB1_SSRX0+ USB0_LSRX USB1_SSTX1- eDP_TX1- USB0_LSTX USB1_SSRX1- USB1_SSTX1+ eDP_TX1+ USB1_SSRX1+ USB0_AUX- USB0_SSTX0- eDP_TX2- USB0_AUX+ USB0_SSRX0- USB0_SSTX0+ eDP_TX2+ LID# USB0_SSRX0+ SLEEP# USB0_SSTX1- eDP_TX3- VCC_BOOT_SPI USB0_SSRX1- USB0_SSTX1+ eDP_TX3+ BOOT_SPI_CS# USB0_SSRX1+ BSEL0 SATA0_RX- eSPI_IO0 BSEL1 BOOT_SPI_IO0...
  • Page 25 Client Row A Row B Row C Row D PCIe09_TX- PCIe09_RX+ PCIe01_RX- PCIe01_TX+ PCIe09_TX+ PCIe01_RX+ PCIe10_RX- PCIe02_TX- PCIe10_TX- PCIe10_RX+ PCIe02_RX- PCIe02_TX+ PCIe10_TX+ PCIe02_RX+ PCIe11_RX- PCIe03_TX- PCIe11_TX- PCIe11_RX+ PCIe03_RX- PCIe03_TX+ PCIe11_TX+ PCIe03_RX+ PCIe12_RX- PCIe04_TX- PCIe12_TX- PCIe12_RX+ PCIe04_RX- PCIe04_TX+ PCIe12_TX+ PCIe04_RX+ PCIe13_RX- PCIe05_TX- PCIe13_TX- PCIe13_RX+...
  • Page 26 Client Row A Row B Row C Row D GPIO_04 IPMB_DAT UART0_CTS# NBASET0_MDI2+ GPIO_05 GP_SPI_MOSI I2C0_CLK GPIO_06 GP_SPI_MISO I2C0_DAT NBASET0_MDI3- GPIO_07 GP_SPI_CS0# I2C0_ALERT# NBASET0_MDI3+ GPIO_08 GP_SPI_CS1# I2C1_CLK NBASET0_LINKMA GPIO_09 GP_SPI_CS2# I2C1_DAT GPIO_10 GP_SPI_CS3# NBASET0_SDP BASET0_LINK_ID# NBASET0_LINK_A GPIO_11 GP_SPI_CLK NBASET0_CTREF TYPE0 GP_SPI_ALERT# TYPE1 TYPE2...
  • Page 27: Row E/F/G/H Connector (J2)

    2.3.2 Row E/F/G/H Connector (J2) Client Row E Row F Row G Row H RAPID_SHUTDOW FUSA_STATUS0 VCC_5V_SBY FUSA_STATUS1 USB2_SSTX0- DDI2_SDA_AUX- FUSA_ALERT# USB2_SSRX0- USB2_SSTX0+ DDI2_SCL_AUX+ FUSA_SPI_CS# USB2_SSRX0+ FUSA_SPI_CLK USB2_SSTX1- DDI2_PAIR0- FUSA_SPI_MISO USB2_SSRX1- USB2_SSTX1+ DDI2_PAIR0+ FUSA_SPI_MOSI USB2_SSRX1+ FUSA_SPI_ALERT USB3_SSTX0- FUSA_VOLTAGE_E DDI2_PAIR1- USB3_SSRX0- USB3_SSTX0+ DDI2_PAIR1+ PROCHOT#...
  • Page 28 Client Row E Row F Row G Row H PCIe33_TX+ PCIe41_RX+ PCIe34_RX- PCIe42_TX- PCIe34_TX- PCIe34_RX+ PCIe42_RX- PCIe42_TX+ PCIe34_TX+ PCIe42_RX+ PCIe35_RX- PCIe43_TX- PCIe35_TX- PCIe35_RX+ PCIe43_RX- PCIe43_TX+ PCIe35_TX+ PCIe43_RX+ PCIe36_RX- PCIe44_TX- PCIe36_TX- PCIe36_RX+ PCIe44_RX- PCIe44_TX+ PCIe36_TX+ PCIe44_RX+ PCIe37_RX- PCIe45_TX- PCIe37_TX- PCIe37_RX+ PCIe45_RX- PCIe45_TX+ PCIe37_TX+ PCIe45_RX+...
  • Page 29 Client Row E Row F Row G Row H PCIe18_TX+ PCIe26_RX+ PCIe19_RX- PCIe27_TX- PCIe19_TX- PCIe19_RX+ PCIe27_RX- PCIe27_TX+ PCIe19_TX+ PCIe27_RX+ PCIe20_RX- PCIe28_TX- PCIe20_TX- PCIe20_RX+ PCIe28_RX- PCIe28_TX+ PCIe20_TX+ PCIe28_RX+ PCIe21_RX- PCIe29_TX- PCIe21_TX- PCIe21_RX+ PCIe29_RX- PCIe29_TX+ PCIe21_TX+ PCIe29_RX+ PCIe22_RX- PCIe30_TX- PCIe22_TX- PCIe22_RX+ PCIe30_RX- PCIe30_TX+ PCIe22_TX+ PCIe30_RX+...
  • Page 30 Client Row E Row F Row G Row H NBASET1_SDP CSI0_RX2+ NBASET1_LINK_MI NBASET1_MDI3- CSI1_RX3- NBASET1_LINK_AC NBASET1_MDI3+ CSI0_RX3- CSI1_RX3+ NBASET1_LINK_M CSI0_RX3+ RSVD CSI1_CLK- RSVD RSVD CSI0_CLK- CSI1_CLK+ RSVD CSI0_CLK+ ETH0_TX- CSI1_I2C_CLK ETH0_RX- ETH0_TX+ CSI0_I2C_CLK CSI1_I2C_DAT ETH0_RX+ CSI0_I2C_DAT CSI1_MCLK ETH1_TX- CSI0_MCLK CSI1_RST# ETH1_RX- ETH1_TX+ CSI0_RST#...
  • Page 31: Lpc (Lpc1)

    2.3.3 LPC (LPC1) Pin Name Signal Type LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 +V3P3S LPC_FRAME# BUF_PLT_RST# CLK_PCI_COM INT_SERIRQ Note: Onboard LPC connector is for debug purposes only. 2.3.4 Battery (JRTC1) Pin Name Signal Type +VRTC_BATT Chapter 2 – Hardware Information...
  • Page 32: 2280 M-Key (M2)

    2.3.4 M.2 2280 M-Key (M2) Pin Name Signal Type +V3P3S_NGFF +V3P3S_NGFF CARD_PWR_OFF_N M.2_LED# +V3P3S_NGFF +V3P3S_NGFF +V3P3S_NGFF +V3P3S_NGFF Chapter 2 – Hardware Information...
  • Page 33 Pin Name Signal Type PCIE14_M.2_RXN PCIE14_M.2_RXP PCIE14_M.2_TXN PCIE14_M.2_TXP SMB_CLK_2280 PCIE13_M.2_RXN SMB_DATA_2280 PCIE13_M.2_RXP PCIE13_M.2_TXN PCIE13_M.2_TXP M.2_SSD_RST# PCIE_M.2_CLKREQ# Chapter 2 – Hardware Information...
  • Page 34 Pin Name Signal Type PCIECLK_M.2_DN PCIE_WAKE# PCIECLK_M.2_DP PCH_SUSCLK +V3P3S_NGFF +V3P3S_NGFF +V3P3S_NGFF Chapter 2 – Hardware Information...
  • Page 35: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 36: System Test And Initialization

    System Test and Initialization The board uses certain routines to test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.
  • Page 37: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This information is stored in the battery-backed CMOS RAM and BIOS NVRAM so it retains the Setup information when the power is turned off. To enter Setup, power on the computer and press <Del>...
  • Page 38: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 39: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 40: Graphics Configuration

    3.4.1 Graphics Configuration Options Summary Output Select HDMI2[ACTIVE] Optimal Default, Failsafe Default Select HDMI2 for GOP Driver. Chapter 3 – AMI BIOS Setup...
  • Page 41: Cpu Configuration

    3.4.2 CPU Configuration Options Summary Intel (VMX) Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Hyper-Threading Technology. Chapter 3 –...
  • Page 42: Efficient-Core Information

    3.4.2.1 Efficient-Core Information Chapter 3 – AMI BIOS Setup...
  • Page 43: Performance-Core Information

    3.4.2.2 Performance-Core Information Chapter 3 – AMI BIOS Setup...
  • Page 44: Memory Configuration

    3.4.3 Memory Configuration Chapter 3 – AMI BIOS Setup...
  • Page 45: On-Module H/W Monitor

    3.4.4 On-Module H/W Monitor Chapter 3 – AMI BIOS Setup...
  • Page 46: Smart Fan Mode Configuration

    3.4.4.1 Smart Fan Mode Configuration FAN 1: Full Mode Options Summary FAN 1 Full Mode Optimal Default, Failsafe Default Manual Mode by PWM Auto -Slope Linear Smart Fan Mode Select. PWM signal Non-inverting Optimal Default, Failsafe Default Inverting Select output PWM of inverting or non-inverting signal. Chapter 3 –...
  • Page 47 FAN 1: Manual Mode by PWM Options Summary Full Mode FAN 1 Manual Mode Optimal Default, Failsafe Default Auto -Slope Linear Set Fan at fixed Duty-Cycle Min=0 Max=100 Please input Dec number: Manual Setting Optimal Default, Failsafe Default Set Fan at fixed Duty-Cycle Min=0 Max=100 Please input Dec number: Chapter 3 –...
  • Page 48 FAN 1: Auto Mode by PWM Options Summary FAN 1 Full Mode Manual Mode Auto -Slope Linear Optimal Default, Failsafe Default Smart Fan Mode Select. PWM signal Non-inverting Optimal Default, Failsafe Default Inverting Select output PWM of inverting or non-inverting signal. Thermal Monitoring CPU Temperature (PECI) Optimal Default, Failsafe Default...
  • Page 49: Pch-Fw Configuration

    Options Summary Slope (PWM) 0 (PWM) 1 (PWM) Optimal Default, Failsafe Default 2 (PWM) 4 (PWM) 8 (PWM) 16 (PWM) 32(PWM) 64(PWM) Slope (PWM) 3.4.5 PCH-FW Configuration Chapter 3 – AMI BIOS Setup...
  • Page 50: Firmware Update Configuration

    3.4.5.1 Firmware Update Configuration Options Summary Me FW Image Re-Flash Disabled Optimal Default, Failsafe Default Enabled Enable/ Disable Me FW Image Re-Flash Function. FW Update Disabled Enabled Optimal Default, Failsafe Default Enable/Disable ME FW Update Function. Chapter 3 – AMI BIOS Setup...
  • Page 51: On-Module Configuration

    3.4.6 On-Module Configuration Options Summary Battery Management Disabled Optimal Default, Failsafe Default One Battery Enable to support battery in ACPI OS by I2C_CK, I2C_DAT (B33, B34) Chapter 3 – AMI BIOS Setup...
  • Page 52: Power Management

    3.4.7 Power Management Options Summary Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select system power mode. Restore AC Power Loss Last State Always On Always Off Optimal Default, Failsafe Default SIO Restore AC Power Loss: To decide the behavior after system power cut then resupply.
  • Page 53: Aaeon Bios Robot

    3.4.8 AAEON BIOS Robot Options Summary Sends watch dog before Disabled Optimal Default, Failsafe Default BIOS POST Enabled Enabled - Robot set Watch Dog Timer (WDT) right after power on, before BIOS start POST process. And then Robot will clear WDT on completion of POST. WDT will reset system automatically if it is not cleared before its timer counts down to zero.
  • Page 54 Options Summary Enabled - Robot holds BIOS before POST completion. This allows BIOS POST to start with stable power or start after system is physically warmed-up. Note: Robot does this after 'Send watch dog before BIOS POST'. Reset system once Disabled Optimal Default, Failsafe Default Enabled...
  • Page 55: Aaeon Smart Boost

    3.4.9 AAEON Smart Boost AAEON Smart Boost: Smart Boost Options Summary AAEON Smart Boost Smart Boost Optimal Default, Failsafe Default Maximum Performance Good Stability Disable AAEON Smart Boost Mode Select. Chapter 3 – AMI BIOS Setup...
  • Page 56 AAEON Smart Boost: Maximum Performance Options Summary AAEON Smart Boost Smart Boost Maximum Performance Optimal Default, Failsafe Default Good Stability Disable AAEON Smart Boost Mode Select. Chapter 3 – AMI BIOS Setup...
  • Page 57 AAEON Smart Boost: Good Stability Options Summary AAEON Smart Boost Smart Boost Maximum Performance Good Stability Optimal Default, Failsafe Default Disable AAEON Smart Boost Mode Select. CPU Performance 100% Optimal Default, Failsafe Default CPU Performance. Chapter 3 – AMI BIOS Setup...
  • Page 58 AAEON Smart Boost: Disable Options Summary AAEON Smart Boost Smart Boost Maximum Performance Good Stability Disable Optimal Default, Failsafe Default AAEON Smart Boost Mode Select. Chapter 3 – AMI BIOS Setup...
  • Page 59: Setup Submenu: System I/O

    Setup Submenu: System I/O Chapter 3 – AMI BIOS Setup...
  • Page 60: Pci Express Configuration

    3.5.1 PCI Express Configuration Options Summary PCI Express Root Port 1 Disabled Enabled Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable.
  • Page 61 Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Gen4 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. PCI Express Root Port 3 Disabled Optimal Default, Failsafe Default Enabled Control the PCI Express Root Port.
  • Page 62 Options Summary 1.7% 1.8% 1.9% 2.0% Disable Pcie Pll SSC. PCIe Controller 1 Setting PCIE Controller are four ×1 Optimal Default, Failsafe Default PCIE Controller are one ×2 and two ×1 PCIE Controller are two ×2 PCIE Controller is one ×4 PCIe Controller 1 Setting.
  • Page 63 Options Summary PCI Express Root Port 2 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable.
  • Page 64 Options Summary Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. PCI Express Root Port 4 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed.
  • Page 65 Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. Options Summary PCI Express Root Port 7 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port.
  • Page 66 Options Summary PCI Express Hot Plug Enable/Disable. PCI Express Root Port 8 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable.
  • Page 67 Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled Configure PCIe Speed. PCI Express Root Port 14 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default...
  • Page 68 Options Summary PCI Express Root Port 15 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable.
  • Page 69 Options Summary Hot Plug Disabled Optimal Default, Failsafe Default Enabled Configure PCIe Speed. PCI Express Root Port 22 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed.
  • Page 70 Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. Options Summary PCI Express Root Port 23 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port.
  • Page 71 Options Summary Hot Plug Disabled Optimal Default, Failsafe Default Enabled PCI Express Hot Plug Enable/Disable. PCI Express Root Port 24 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed.
  • Page 72 Options Summary PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PCIe Speed. Hot Plug Disabled Optimal Default, Failsafe Default Enabled Configure PCIe Speed. PCI Express Root Port 28 Disable Enable Optimal Default, Failsafe Default Control the PCI Express Root Port. PCIe Speed Auto Optimal Default, Failsafe Default...
  • Page 73: Storage Configuration

    3.5.2 Storage Configuration Chapter 3 – AMI BIOS Setup...
  • Page 74: Vmd Setup Menu

    3.5.3 VMD Setup Menu Options Summary Enable VMD controller Disabled Optimal Default, Failsafe Default Enabled Enable/Disable to VMD controller. Chapter 3 – AMI BIOS Setup...
  • Page 75: Nmve Configuration

    3.5.4 NMVe Configuration Chapter 3 – AMI BIOS Setup...
  • Page 76: Sata Configuration

    3.5.5 SATA Configuration Options Summary SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable/Disable SATA Device. Port 0 Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port. Hot Plug Disabled Optimal Default, Failsafe Default Enabled Designates this port as Hot Pluggable. SATA Device Type Hard Disk Drive Optimal Default, Failsafe Default...
  • Page 77: Hd Audio Configuration

    Options Summary Designates this port as Hot Pluggable. SATA Device Type Hard Disk Drive Optimal Default, Failsafe Default Solid State Drive Identify the SATA port is connected to Solid State Drive or Hard Disk Drive. 3.5.6 HD Audio Configuration Options Summary HD Audio Disabled Enabled...
  • Page 78: Digital Io Port Configuration

    3.5.7 Digital IO Port Configuration Options Summary DIO 1-12 Input Output Optimal Default, Failsafe Default Set DIO as Input or Output. Output Level High Optimal Default, Failsafe Default Set output level when DIO pin is output. Chapter 3 – AMI BIOS Setup...
  • Page 79: Legacy Logical Devices Configuration

    3.5.8 Legacy Logical Devices Configuration Chapter 3 – AMI BIOS Setup...
  • Page 80: Serial Port 1 Configuration

    3.5.8.1 Serial Port 1 Configuration Options Summary Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=3F8h; IRQ=4; DMA; IO=2C8h; IRQ=11; DMA; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 81: Serial Port 2 Configuration

    3.5.8.2 Serial Port 2 Configuration Options Summary Use This Device Disabled Optimal Default, Failsafe Default Enabled Enable or Disable this Logical Device. Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8h; IRQ=3 DMA; IO=2D8h; IRQ=10; DMA; Allows the user to change the device resource settings. New settings will be reflected on this setup page after system restarts.
  • Page 82: Serial Port Console Redirection

    3.5.9 Serial Port Console Redirection Options Summary Console Redirection Disabled Optimal Default, Failsafe Default Enabled Console Redirection Enable or Disable. Chapter 3 – AMI BIOS Setup...
  • Page 83: Setup Submenu: Security

    Setup Submenu: Security Change Administrator/User Password You can set an Administrator password. If you set an Administrator password, you can then set a User password. User passwords do not have access to many of the features in the Setup utility. Select the password you want to set and press <Enter>.
  • Page 84: Secure Boot

    3.6.1 Secure Boot Options Summary Secure Boot Disabled Optimal Default, Failsafe Default Enabled Secure Boot feature is Active if Secure Boot is Enabled, Platform Key (PK) is enrolled and the System is in User mode. The mode change requires platform reset Secure Boot Mode Standard Custom...
  • Page 85: Key Management

    3.6.1.1 Key Management Options Summary Factory Key Provision Disabled Optimal Default, Failsafe Default Enabled Install factory default Secure Boot keys after the platform reset and while the System is in Setup mode Chapter 3 – AMI BIOS Setup...
  • Page 86: Trusted Computing

    3.6.2 Trusted Computing Options Summary Security Device Disable Support Enable Optimal Default, Failsafe Default Enables or Disables BIOS support for security device. O.S. will not show Security Device. TGU EFI protocol and INT1A interface will not be available. SHA 256 PCR Bank Disabled Enabled Optimal Default, Failsafe Default...
  • Page 87 Options Summary Enable or Disable Platform Hierarchy. Storage Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Storage Hierarchy. Endorsement Hierarchy Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Endorsement Hierarchy. Physical Presence Spec Version Optimal Default, Failsafe Default Select to Tell O.S.
  • Page 88: Setup Submenu: Boot

    Setup Submenu: Boot Options Summary Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or Disables Quite Boot option. Network Stack Disabled Optimal Default, Failsafe Default UEFI Enable/Disable UEFI Network Stack. Chapter 3 – AMI BIOS Setup...
  • Page 89: Setup Submenu: Save & Exit

    Setup Submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 90: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 91: Drivers Download And Installation

    Drivers Download and Installation Drivers for the HPC-RPSC/HPC-ADSC can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/com-expresscpu-module-hpc-adsc-hpc-rpsc Download the driver(s) you need and follow the steps below to install them. Chipset Driver Open the folder where you unzipped the Chipset Drivers Run the SetupChipset.exe file in the folder Follow the instructions Drivers will be installed automatically...
  • Page 92 LAN Drivers Open the folder where you unzipped the LAN Drivers Read the ReadMe.txt file before proceeding. Caution: Be sure to install the driver package before installing the Intel® PROSet package. Open the Wired_driver_26.8_x64 folder Run the Wired_driver_26.8_x64.exe file in the folder Follow the instructions, drivers will be installed automatically.
  • Page 93: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...
  • Page 94: I/O Address Map

    I/O Address Map Appendix A - I/O Information...
  • Page 95: A.2 Memory Address Map

    A.2 Memory Address Map Appendix A - I/O Information...
  • Page 96: A.3 Large Memory Address Map

    A.3 Large Memory Address Map Appendix A - I/O Information...
  • Page 97: A.4 Irq Mapping Chart

    A.4 IRQ Mapping Chart Appendix A - I/O Information...
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  • Page 99 Appendix A - I/O Information...
  • Page 100 Appendix A - I/O Information...
  • Page 101 Appendix A - I/O Information...
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