Circuit Operations - HP 26067A Manual

HP-IB INTERFACE/26067B
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c. HP-IB Processor
The HP-IB processor manages all HP-IB bus
protocol control operations involved in the
transfer of data/command information to and
from the HP-IB bus. Data or commands
received on the HP-IB bus are transferred
across the interface data bus to the I/O
processor for action. Commands transferred
across the HP-IB bus are handled by the I/O
processor and the required action taken. The
HP-IB processor performs these bus
communications as directed by the I/O
processor; and, the I/O processor as directed by
the printer processor.
3-5. CIRCUIT OPERATION
A brief description of the data flow through the
interface is used to provide a general
understanding of how the various interface
circuits work together to transfer data. This
data flow describes the transfer of data from the
computer to the HP-IB interface, where it is
stored until the printer is ready to accept it.
The computer initiates the transfer when it has
data for the printer by issuing an HP-IB Request
To Write command to the interface When the
HP-IB processor (see figure 4-4) receives the
command from the bus it sets the End Or
Secondary Interrupt (-EOSINT) signal which
inturn sets the INT signal to the I/O processor.
The I/O processor Interrupt (-INT) signal, when
enabled, informs the I/O processor that some
circuit requires action.
The I/O processor can be interrupted by anyone
of three interrupts: End Or Secondary Interrupt
(EOSINT), HP-IB Interrupt (HPIBINT), or the
Slave Interru pt (INTSLV). The slave In terru pt
signal is generated by the I/O control circuitry,
when the printer processor requests access to the
I/O RAM memory. The other two interrupt
signals, EOSINT and HPIBINT, are generated by
the HP-IB processor. The HPIBINT is enabled if
the HP-IB processor receives an HP-IB Device
Clear command across the bus or a parity error is
detected on the bus. The EOSINT signal is
enabled if an HP-IB command or the last data
byte of a data block is received across the HP-IB
bus. Since, in this case, the EOSINT interrupt
enables the I/O processor will read the
data/command from the HP-IB processor.
To transfer the command from the HP-IB
processor to the I/O processor, the I/O processor
will identify the action to the HP-IB processor
through the address select lines and then enables
the I/O Go (lOGO) signal. I/O Go (lOGO) signal
triggers the HP-IB processor to output the data.
When the data is on the bus the I/O processor
reads the data and identifing the command.
This command (HP-IB Write Data command)
indicates to the I/O processor that the computer
has print data for the printer. This print data
must be stored into the shared I/O RAM memory
using the master/slave shared memory
communication protocol (described in paragraph
3-2). The I/O processor builds a packet for the
printer control processor identifying the
command and the amount and location of data
involved. This packet data is written into the
I/O RAM.
When the I/O processor is ready to accept the
data from the HP-IB processor, the I/O processor
will enable the HP-IB processor lOGO signal.
When the lOGO signal is enabled the HP-IB
processor outputs the data onto the interface bus
and the I/O processor performs a read operation
to read the data. This data byte is to be
transferred into the I/O RAM memory.
For the I/O processor to write to the I/O RAM
memory the I/O processor enables MREQ and
WR. These signals inform the control circuitry
that the I/O processor requires access to the I/O
RAM memory. The control circuitry determines
if the I/O RAM memory is available (is not being
accessed by the printer control processor). Since
the I/O RAM memory is shared by the printer
control processor and the I/O processor, only one
processor may access the memory at a time. If
the printer control processor is using the I/O
RAM memory, the I/O processor may be
required to wait. If the I/O RAM memory is not
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