High Speed Counter With Value Capture, Zero Reset And Overflow Detection - ABB AC 31 Technical Manual

Advant controller 31 40 & 50 series
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4. High speed counter with value capture, zero reset and overflow detection

ABB Control - AC 31
1SBC 260400 R1001-b
06.99
Program Optimization
The counter input enables counting the signals which have a frequency greater than that of the
cycle time. The capture inputs also enable real time reading of the counter value.
The 40 and 50 series central units also contain an incremental up/down counter encoder input
with direction discrimination, or 2 independent counter inputs.
The counter function, as well as the counter mode, is validated by the CTUH function block. In
this case the I62.00 and I62.01 inputs are reserved for counting.
#1
RESET
SET
INIT
RPI
CATCH
R_Q
Mode # 1 validates the I62.00 input counter and the capture by I62.02.
Mode # 2 validates the I62.01 input counter and the capture by I62.03.
Mode # 3 validates the counter in 2 channel incremental mode and the capture by I62.02.
Two CTUH functions are therefore necessary for 2 independent counters.
The counter value varies from 0 to 32767 then from -32768 to 0.
The counter incrementation is never blocked.
The overflow indication allows the detection of the passages of -1 to 0 of the counter in
independent mode and the passage of -1 to 0 and 0 to -1 in 2 channel incremental mode.
The overflow thereby enables counting the counter "rotations". As soon as the overflow bit is
used by the program it can be reset to zero by the R-Q input of the CTUH function.
The capture inputs are used in the place of the I62.02 and I62.03 inputs.
When the RPI input of the CTUH function is validated the I62.02 or I62.03 capture input
catches the counter value and then resets it to 0.
Comment:
The interruption inputs, I62.02 and I62.03, may still be used.
The maximum counter frequency is 5 kHz and the typical delay of the capture inputs is 10 µs.
Utilization faults:
If one of the two cables of the incremental encoder is cut or not connected, the counter value
is incremented by + 1 and then decremented by - 1 with each new pulse.
CTUH
(NUM
R
S
INIT
OVERFLOW
RPI
Q
VALUE
CATCH
CV
CATCH_VAL
R-Q
CATV
Page 6-11

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