Signal Processing (2/2) (Pt-Dz12000*/D12000*) - Panasonic PT-DZ12000U Service Manual

Dlp based projector
Hide thumbs Also See for PT-DZ12000U:
Table of Contents

Advertisement

PT-DZ12000U / PT-DZ12000E / PT-D12000U / PT-D12000E / PT-DW100U / PT-DW100E

15.4. Signal Processing (2/2) (PT-DZ12000*/D12000*)

Signal Processing (2/2)
(for PT-DZ12000*/D12000*)
1
POCLK
IC2005
IP CONVERTER,
2
SCALING
128M
DDR-SDRAM
IC2006, IC2007
4
3
IC2638
INVERTER
IC2615
CPUGOOD_OUT
AN_CPUH
CPUHS
4
CPU
CPUPOWERGOOD
IC2604, IC2605
IIC
SELECTORS
4
5
IC2515
INVERTER
A-P.C.Board
WF-Module
A6
WF1
RTFV
IC5512
RTFH
EEPROM
RTFOACT
RTFEACT
IC5502
WARP
X5505
27 MHz
WF2
FH1
IC5001
IC2635
IIC_SEL0-3
I/O
IC2505
I/O
X5001
IC2506
100 MHz
CPU_AD_ETC
SELECTOR
S1
A2
FH-Module
IC2514
P_PWRGOOD
INVERTER
PC-Module
PC4
IC5106
IC5501
FPGA
IC5503
DDR
SDRAM
IC5504
FPGA
FLASH
MEMORY
IC5511
FPGA
IC5105
IC5102
CLOCK
GENERATOR
150 MHz
SRAM
X5102
IC5103
IC5104
FLASH
MEMORY
CLOCK
GENERATOR
200 MHz
IC5101
X5103
3
PWRGOOD
FPGA
3
RESETZ
84
IC4007
LVDS
FH8
FR1
RECEIVER
REBOOTZ
RLDRAM
RESET
FPGA
R
TERM. REG
IC4003
FH9
FR3
IC4005
R
DMD
REGULATOR
SAT_PROG_B
IC4006
FR-Module
(PT-DZ12000* only)
IC4307
LVDS
FH6
FG1
RECEIVER
REBOOTZ
RESET
FPGA
RLDRAM
G
TERM. REG
IC4303
FH7
FG3
IC4305
G
DMD
REGULATOR
SAT_PROG_B
IC4306
FG-Module
(PT-DZ12000* only)
IC4307
LVDS
RECEIVER
FH4
FG1
REBOOTZ
RESET
FPGA
RLDRAM
B
TERM. REG
IC4303
FH5
FG3
IC4305
B
DMD
REGULATOR
SAT_PROG_B
IC4306
FG-Module
(PT-DZ12000* only)
IC4008, IC4009
RLDRAM
IC4002
Q4002
RLDRAM
RESET
PT-DZ12000* :
WUXGA DMD
PT-D12000* :
SXGA+ DMD
IC4308, IC4309
RLDRAM
IC4302
Q4302
RLDRAM
RESET
PT-DZ12000* :
WUXGA DMD
PT-D12000* :
SXGA+ DMD
IC4308, IC4309
RLDRAM
IC4302
Q4302
RLDRAM
RESET
PT-DZ12000* :
WUXGA DMD
PT-D12000* :
SXGA+ DMD

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Pt-d12000uPt-dw100ePt-dz12000ePt-d12000ePt-dw100u

Table of Contents