Mitsubishi Electric MELSEC iQ-R Series User Manual page 92

Condition target setting [n]
Set an interrupt factor to be detected.
Setting value
0
1
2
3
4
5
• If a value other than those shown in the above table is set, a condition target setting range error (error code: 181H)
occurs.
• When an input signal (X) or a buffer memory area set in 'Condition target setting [n]' (Un\G728 to Un\G743) turns off and
on, an interrupt request is sent to the CPU module. The interrupt conditions for the setting values are shown below.
Setting value
Invalid
Error occurrence
Accumulating counter comparison flag
Overflow detection flag
Carry over detection flag
Warning output flag
"n" indicates an interrupt setting number. (n = 1 to 16)
■Buffer memory addresses
The following shows the buffer memory addresses of this area.
Buffer memory name
Condition target setting [n]
Condition target setting [n]
(when Q series-compatible
mode is used)
■Enabling the setting
Turn on and off 'Operating condition setting request flag' (Y1).
■Default value
The default value is Invalid (0) for all areas.
APPX
90
Appendix 3 Buffer Memory Areas
Description
No interrupt is detected.
An interrupt is detected on the rising edge of 'CH1 Error occurrence' (X8) turning on.
An interrupt is detected on the rising edge of 'CH1 Accumulating counter comparison flag' (X10) turning on.
An interrupt is detected on the rising edge of 'CH1 Overflow detection flag' (Un\G6) turning on.
An interrupt is detected on the rising edge of 'CH1 Carry over detection flag' (Un\G7) turning on.
An interrupt is detected on the rising edge of bit 0 or bit 8 of 'CH1 Warning output flag' (Un\G8) turning on.
1 2 3 4 5
728 729 730 731 732
Setting details
Invalid
Error occurrence
Accumulating counter comparison flag
Overflow detection flag
Carry over detection flag
Warning output flag
6 7 8 9 10
733 734 735 736 737
11 12 13 14 15
738 739 740 741 742
16
743