Using The Barrel Shifter; Table 2-4 Data Operations Using Multi-Shift - Motorola DSP56600 Manual

Application optimization for digital signal processors
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Data Operations

Using the barrel shifter

2-8
Optimizing DSP56300/DSP56600 Applications
2.4
USING THE BARREL SHIFTER
The DSP56300/DSP56600 includes a true barrel shifter that can be
used for multi-bit data shifts. The instructions that use the barrel
shifter are listed in Table 2-4.

Table 2-4 Data Operations Using Multi-shift

Mnemonic
Function
Arithmetic
ASL
Shift Left
Arithmetic
ASR
Shift Right
Logical
LSL
Shift Left
Logical
LSR
Shift Right
Fast
NORMF
Normalizat
ion
The logical shifts operate on the most significant register (A1/B1) of
the accumulator destination (the accumulator extension and LS
register are not affected). The arithmetic shifts operate on the full
length of the source and destination accumulators, sign extending
when applicable. In addition to the multi-bit shifts, there are also
four respective single bit shift instructions that allow parallel moves
(the multi-bit shifts do not allow them).
The NORMF instruction deserves special attention, as it can
effectively replace several instructions in many common
algorithms. The NORMF instruction arithmetically shifts the data
from the destination accumulator (D) in the direction and amount
specified by the first operand (C). If C > 0, then D is arithmetically
shifted to the left by C bits. If C < 0, then D is arithmetically shifted
to the right by C bits. The operand C should normally be prepared
by the CLB instruction (Count Leading Bits). The instruction pair:
C,S,D
C: number of shift bits
S: source of shift
D: destination
C,D
S: number of shift bits
D: source & destination
C,D
C: control of shift
D: destination
clb
a,b
normf
b1,a
Operands
6-bit immediate, or
X0,X1,Y0,Y1,A1,B1
A,B
A,B
5 -bit immediate, or
X0,X1,Y0,Y1,A1,B1
A,B
X0,X1,Y0,Y1,A1,B1
A,B
MOTOROLA

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