Table 5-2 Cycle Count Example With And Without; Burst Mode - Motorola DSP56600 Manual

controlled by the user. In a program segment that advances
consecutively (no change of flow), the fetches will be done in groups
of four, initiated by instructions with addresses ending with "00".
The following example is of a program that uses the same DRAM
for the program and the data. The DRAM has 2 wait states for
in-page access and 8 wait states for out-of-page access. The data
pointers R0,R4,R1 all point to addresses in the same DRAM page,
but a different page than the one where the program instructions
are stored.
The code is a benchmark of [1x3][3x3] matrix multiplication, from
the DSP56300 Family Manual , Appendix C. Below are the general
initialization instructions:
move
move
move
move
move
move
Table 5-2 shows the example program and the relevant cycle count.
In the external access columns, "po" and "pi" designate out-of-page
or in-page program fetches, while "do" and "di" designate
out-of-page or in-page data accesses, respectively.
Table 5-2 Cycle Count Example With and Without Burst Mode
No Instruction
i0 nop
i1 move x:(r0)+,x0
i2 mpy x0,y0,a x:(r0)+,x0
i3 mac x0,y0,a x:(r0)+,x0
i4 macr x0,y0,a x:(r0)+,x0
i5 mpy x0,y0,b x:(r0)+,x0
i6 move
i7 mac x0,y0,b x:(r0)+,x0
i8 macr x0,y0,b x:(r0)+,x0
i9 mpy x0,y0,a x:(r0)+,x0
i10 move
MOTOROLA Optimizing DSP56300/DSP56600 Applications
#MAT_A,r0 ;[1x3] matrix
#MAT_B,r4 ;[3x3] matrix
#MAT_X,r1 ;[1x3] output matrix
#2,m0 ;Modulo 3
#8,m4 ;Modulo 9
m0,m1 ;Modulo 3

Burst Mode

External
Accesses
y:(r4)+,y0
y:(r4)+,y0
y:(r4)+,y0
y:(r4)+,y0 1do,1di,1po
y:(r4)+,y0 1do,1di,1po
a,y:(r1)+ 1do,1di,1po
y:(r4)+,y0 1do,1di,1po
y:(r4)+,y0 1do,1di,1po
y:(r4)+,y0 1do,1po
b,y:(r1)+ 1do,1di,1po
Instruction Cache and Memory Features
Burst Mode
Disabled Enabled
External
Cyc
Accesses
1po 9 1po,3pi
1pi 3 -
1pi 3 -
1pi 3 1do,1di
21 2di,1po,3pi
21 1do,1di
21 2di
21 2di
21 2di,1po,3pi
18 1do
21 2di
The Instruction Cache
Cyc
15
12
24
12
6
6
24
9
6
5-7