Hardware Information
Parallel Port
The parallel port (LPT1) on the PG 720 has the following pinout:
Figure 8-6
Pin No. Signal Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
:
25
8-12
1
13
LPT1 Parallel Port (Socket)
/Strobe (CLK)
Data - bit 0
Data - bit 1
Data - bit 2
Data - bit 3
Data - bit 4
Data - bit 5
Data - bit 6
Data - bit 7
/ACK (Acknowledge)
BUSY
PE (PAPER END)
SELECT
/AUTO FEED
/ERROR
/INIT
/SELECT IN
GND
GND
14
25
Input/Output
Output (open collector)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Output (TTL level)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Input (4.7 k
pull up)
Output (open collector)
Input (4.7 k
pull up)
Output (open collector)
Output (open collector)
–
–
PG 720 P Programming Device
C79000-G7076-C721-02