Bus Free Phase - Fujitsu Scan Partner 300C Instruction Manual

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4.3.1 BUS FREE phase

The BUS FREE phase is used to indicate that no SCSI device is actively using the SCSI bus. and that it is available.
SCSI devices shall detect the BUS FREE phase after the SEL and BSY signals are both false for at least a bus settle delay.
SCSI devices shall release all SCSI bus signals within a bus clear delay after the BSY and SEL signals become continuously
false for a bus settle delay.
Table 4.5 Signal delay times definition
Item
Time
Hold time
45 ns
Negation
90 ns
10 sec
selection
(recommended)
time
Reset to
250 ms
selection
(recommended)
time
Reset hold
25 µs
Selection
200 µs
abort time
Selection
250 ms
timeout
(recommended)
delay
Transfer
period
definition
The minimum time added between the assertion of
REQ (Or REQB) or ACK (or ACKB) and the
changing of the data lines to provide hold time in the
initiator or target while using synchronous data
transfers. REQB and ACKIB timings only apply to
optional wide data transfers.
The minimum time that a target shall negate REQ (Or
REQB) while using synchronous data transfers. Also,
the minimum time that an initiator shall negate ACK
(or ACKB) while using synchronous data transfers.
REQB and ACKB timings only apply to optional
wide data transfers.
The recommended maximum time from power
application until an SCSI target is able to respond
with appropriate status and sense data to the TEST
UNIT READY, INQUIRY, and REQUEST SENSE
commands
The recommended maximum time after a hard
RESET condition until an SCSI target is able to
respond with appropriate status and sense data to the
TEST UNIT READY, INQUIRY and REQUEST
SENSE commands
The minimum time over which RST must be kept
asserted
The maximum time required from the moment when
selection or deselection of an initiator or target is
detected until BSY is asserted
The minimum time required for an initiator or target
in the selection or deselection phase to wait for a
BSY response before it starts the timeout procedure
The minimum allowable period, during sync data
transfer, between the start of consecutive REQ pulses
and the start of consecutive ACK pulses
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