The Formula And The Example Of A Setting Of A Pll Multiplication Value; Table 1.1 Details Of [Cgpll0Sel]<Pll0Set[23:0]> Setup; Table 1.2 Pll Correction (Example) - Toshiba TXZ+ TMPM4MNFYAFG Reference Manual

The formula and the example of a setting of a PLL multiplication value

The details of the items of [CGPLL0SEL]<PLL0SET[23:0]> which set up a PLL multiplication value are shown
below.
Table 1.1 Details of [CGPLL0SEL]<PLL0SET[23:0]> setup
The items of PLL0SET
[23:17]
[16:14]
[13:12]
[11:8]
[7:0]
Note: A multiplication value is the total of <PLL0SET[7:0]> (integer part) and <PLL0SET[11:8]>
(fraction part).
f is denoted by the following formulas.
PLL
f = f × ([CGPLL0SEL]<PLL0SET[7:0]> + [CGPLL0SEL]<PLL0SET[11:8]>)
PLL OSC
× ([CGPLL0SEL]<PLL0SET[13:12]>)
Note1: The absolute value of frequency accuracy is not guaranteed.
Note2: There is no Linearity in the frequency by the Fraction part Multiplication setup.
≤ (Maximum Operating Frequency)
Note3: f
PLL
Correction The quotient of f
value setup 1.2.
000: 6 ≤ f
001: 7 < f
f setup 010: 8 < f
OSC
011: 10 < f
100 to 111: Reserved
00: Reserved
01: Dividing by 2 (×1/2)
Dividing setup
10: Dividing by 4 (×1/4)
11: Dividing by 8 (×1/8)
0000: 0.0000
0001: 0.0625
0010: 0.1250
Fraction part
0011: 0.1875
Multiplication
0100: 0.2500
setup
0101: 0.3125
0110: 0.3750
0111: 0.4375
0x00:
0x01:
Integer part 0x02:
Multiplication
setup 0xFD: 253
0xFE: 254
0xFF: 255

Table 1.2 PLL correction (example)

f (MHz)
OSC
(a decimal, an integral value)
6.00
8.00
10.00
12.00
The PLL correction value can be calculated below.
= 10.0 MHz, 10.0/0.45 = 22.22  23; A fraction part is rounded up.
f
OSC
Clock Control and Operation Mode
Function
/450000 (integer). For detail refer to Table
OSC
≤ 7
OSC
≤ 8
OSC
≤ 10
OSC
≤ 12
OSC
0
1
2
:
<PLL0SET[23:17]>
14
18
23
27
15 / 64
TXZ+ Family
TMPM4M Group(1)
(unit: MHz)
1000: 0.5000
1001: 0.5625
1010: 0.6250
1011: 0.6875
1100: 0.7500
1101: 0.8125
1110: 0.8750
1111: 0.9375
2022-06-24
Rev. 1.1