Toshiba TXZ+ TMPM4MNFYAFG Reference Manual page 35

Bit Bit Symbol After reset
24 IPMENA24
23 IPMENA23
22 IPMENA22
21 IPMENA21
20 IPMENA20
19 IPMENA19
18 -
17 IPMENA17
16 IPMENA16
15 -
14 -
13 -
12 IPMENA12
11 IPMENA11
10 IPMENA10
9 IPMENA09
8 IPMENA08
7 IPMENA07
6 IPMENA06
Type
Clock enable of UART ch3 (TSEL24)
0 R/W
0: Clock stop
1: Clock supply
Clock enable of UART ch2 (TSEL23)
0 R/W
0: Clock stop
1: Clock supply
Clock enable of UART ch1 (TSEL22)
0 R/W
0: Clock stop
1: Clock supply
Clock enable of UART ch0 (TSEL21)
1 R/W
0: Clock stop
1: Clock supply
Clock enable of TSPI ch1 (TSEL20)
0 R/W
0: Clock stop
1: Clock supply
Clock enable of TSPI ch0 (TSEL19)
0 R/W
0: Clock stop
1: Clock supply
0 R Read as "0"
Clock enable of PORT V
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT U
0 R/W
0: Clock stop
1: Clock supply
0 R Read as "0"
0 R Read as "0"
0 R Read as "0"
Clock enable of PORT N
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT M
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT L
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT K
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT J
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT H
0 R/W
0: Clock stop
1: Clock supply
Clock enable of PORT G
0 R/W
0: Clock stop
1: Clock supply
35 / 64
TMPM4M Group(1)
Clock Control and Operation Mode
Function
TXZ+ Family
2022-06-24
Rev. 1.1